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TPIC44L02DB Datasheet(PDF) 7 Page - Texas Instruments |
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TPIC44L02DB Datasheet(HTML) 7 Page - Texas Instruments |
7 / 20 page TPIC44L01, TPIC44L02, TPIC44L03 4-CHANNEL SERIAL AND PARALLEL LOW-SIDE PRE-FET DRIVER SLIS062A – NOVEMBER 1996 – REVISED SEPTEMBER 1997 7 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 switching characteristics, VCC = 5 V, Vbat = 12 V, TC = 25°C PARAMETER TEST CONDITIONS MIN TYP MAX UNIT t(STBFM) Short-to-battery/shorted-load/open-load fault mask time See Figures 14 and 15 60 µs t(STBDG) Short-to-battery/shorted-load deglitch time See Figure 14 8 µs tPLH Propagation turn-on delay time, CS or IN0-IN3 to GATE0-GATE3 C(gate) = 400 pF, See Figure 1 4 µs tPHL Propagation turn-off delay time, CS or IN0-IN3 to GATE0-GATE3 C(gate) = 400 pF, See Figure 2 3.5 µs tr1 Rise time GATE0–GATE3 C(gate) = 400 pF, See Figure 3 3.5 µs tf1 Fall time, GATE0–GATE3 C(gate) = 400 pF, See Figure 4 3 µs f(SCLK) Serial clock frequency 10 MHz trf(SB) Refresh time, short-to-battery TPIC46L01 only, See Figure 14 10 ms tw Refresh pulse width, short-to-battery TPIC46L01 only, See Figure 14 68 µs td1 Setup time, CS ↓ to ↑SCLK See Figure 5 10 ns tpd1 Propagation delay time, CS ↓ to SDO valid RL = 10 kΩ, See Figure 6 CL = 200 pF, 40 ns tpd2 Propagation delay time, SCLK ↓ to SDO valid See Figure 6 20 ns tpd3 Propagation delay time, CS ↑ to SDO 3-state RL = 10 kΩ, See Figure 7 CL = 50 pF, 2 µs tr2 Rise time, SDO 3-state to SDO valid RL = 10 kΩ to GND, CL = 200 pF, Over-battery fault, See Figure 8 30 ns tf2 Fall time, SDO 3-state to SDO valid RL = 10 kΩ to VCC, CL = 200 pF, No faults, See Figure 9 20 ns tr3 Rise time, FLT RL = 10 kΩ, See Figure 10 CL = 50 pF, 1.2 µs tf3 Fall time, FLT RL = 10 kΩ, See Figure 11 CL = 50 pF, 15 ns Figure 1 tPLH 50% 90% CS or IN0–IN3 GATE0– GATE3 Figure 2 tPHL 50% 50% 10% CS GATE0–GATE3 IN0– IN3 or Figure 3 90% 10% tr1 GATE0–GATE3 Figure 4 GATE0–GATE3 tf1 90% 10% |
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