September 2006

PCS2P20805A

rev 0.3

2.5V CMOS Dual 1-To-5 Clock Driver

2 of 11

Notice: The information in this document is subject to change without notice.

Pin Description

Pin #

Pin Names

Description

9,12

OE

3-State Output Enable Inputs (Active LOW)

10,11

Clock Inputs

2,3,4,6,7

Clock Outputs

19,18,17,15,14

Clock Outputs

1

Power supply for Bank A

20

Power supply for Bank B

5

Ground for Bank A

16

Ground for Bank B

8

Ground

13

MON

Monitor Output

Function Table

Inputs

Outputs

OE

MON

L

L

L

L

L

H

H

H

H

L

Z

L

H

H

Z

H

Note: H = HIGH; L = LOW; Z = High-Impedance

Symbol

Parameter*

Conditions

Typ

Max

Unit

Input Capacitance

3

4

pF

Output Capacitance

6

pF

*This parameter is measured at characterization but not tested.