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ASM3P2274AG-06-OR Datasheet(PDF) 1 Page - PulseCore Semiconductor |
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ASM3P2274AG-06-OR Datasheet(HTML) 1 Page - PulseCore Semiconductor |
1 / 8 page November 2006 ASM3P2274A rev 1.1 Notice: The information in this document is subject to change without notice. PulseCore Semiconductor Corporation 1715 S. Bascom Ave Suite 200, Campbell, CA 95008 • Tel: 408-879-9077 • Fax: 408-879-9018 www.pulsecoresemi.com Low Power 4X Multiplier EMI Reduction IC Features • Generates a 4X EMI optimized clock signal at the output. • Integrated loop filter components. • Operates with a 3.3 / 2.5V Supply. • Low power CMOS design. • Input frequency range: 12MHz to 30MHz for 2.5V. : 12MHz to 30MHz for 3.3V. • Frequency deviation: -1.5% (Typ) @66MHz Output Frequency. • Available in 6-pin TSOT-23 Package. Product Description The ASM3P2274 is a versatile Spread Spectrum Frequency Modulator designed specifically for a wide range of clock frequencies. It provides a 4x Spread Spectrum Modulated output from an input clock source. The ASM3P2274A reduces electromagnetic interference (EMI) at the clock source, allowing system wide reduction of EMI of all clock dependent signals. The ASM3P2274A allows significant system cost savings by reducing the number of circuit board layers ferrite beads, shielding that are traditionally required to pass EMI regulations. The ASM3P2274A uses the most efficient and optimized modulation profile approved by the FCC and is implemented by using a proprietary all digital method. The ASM3P2274A modulates the output of a single PLL in order to “spread” the bandwidth of a synthesized clock, and more importantly, decreases the peak amplitudes of its harmonics. This results in significantly lower system EMI compared to the typical narrow band signal produced by oscillators and most frequency generators. Lowering EMI by increasing a signal’s bandwidth is called ‘spread spectrum clock generation’. Applications The ASM3P2274A is targeted towards all portable devices with very low power requirements like MP3 players,MFP, LCD Panel Module and digital still cameras. Key Specifications Description Specification Supply voltages VDD = 3.3V / 2.5V Cycle-to-Cycle Jitter 360pS (Typ) Output Duty Cycle 45/55% Modulation Rate Equation FIN/640 Frequency Deviation -1.5% (Typ) @ 66MHz Output Block Diagram ModOUT VSS XIN/CLKIN Frequency Divider Feedback Divider Modulation Phase Detector Loop Filter VCO Output Divider PLL VDD PD Crystal Oscillator XOUT |
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