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ASM3P623S00C Datasheet(PDF) 5 Page - PulseCore Semiconductor |
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ASM3P623S00C Datasheet(HTML) 5 Page - PulseCore Semiconductor |
5 / 18 page May 2007 ASM3P623S00B/C/J/E/F/K rev 0.4 Timing-Safe™ Peak EMI Reduction IC 5 of 18 Notice: The information in this document is subject to change without notice. Pin Description for ASM3P623S00K Pin # Pin Name Description 1 XIN/CLKIN Crystal connection or external reference frequency input. This pin has dual functions. It can be connected either to an external crystal or an external reference clock. 2 XOUT Crystal connection. If using an external reference, this pin must be left unconnected. 3 CLKOUT1 1 Buffered clock output 4 VDD 3.3V supply 5 SS% 2 Spread Spectrum Selection 6 GND Ground 7 CLKOUT2 1 Buffered clock output 8 CLKOUT3 1 Buffered clock output 9 SSON 2 Spread Spectrum enable and disable option. When SSON is HIGH, the spread spectrum is enabled and when LOW, it turns off the spread spectrum. 10 CLKOUT4 1 Buffered clock output 11 CLKOUT5 1 Buffered clock output 12 GND Ground 13 VDD 3.3V supply 14 CLKOUT6 1 Buffered clock output 15 CLKOUT7 1 Buffered clock output 16 CLKOUT 1,3 Buffered clock output Notes: 1. Weak pull-down on all outputs. 2. Weak pull-up on these inputs. 3. This output is driven and has an internal feedback for the PLL. 4. Buffered clock outputs are Timing-Safe™ Spread Spectrum Control and Input-Output Skew Table (Note: The values given in the table are for an input frequency of 32MHz) Device SS% Deviation Input-Output Skew(±TSKEW) 0 ±0.25 % 0.125 ASM3P623S00B 1 ±0.5 % 0.25 0 ±0.125 % 0.125 ASM3P623S00C 1 ±0.25 % 0.25 0 ±0.125 % 0.125 ASM3P623S00J 1 ±0.25 % 0.25 0 ±0.25 % 0.125 ASM3P623S00E 1 ±0.5 % 0.25 0 ±0.125 % 0.125 ASM3P623S00F 1 ±0.25 % 0.25 0 ±0.125 % 0.125 ASM3P623S00K 1 ±0.25 % 0.25 Note: TSKEW is measured in units of the Clock Period |
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