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TMS370C036A Datasheet(PDF) 2 Page - Texas Instruments |
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TMS370C036A Datasheet(HTML) 2 Page - Texas Instruments |
2 / 48 page TMS370Cx36 8-BIT MICROCONTROLLER SPNS039B – JANUARY 1996 – REVISED FEBRUARY 1997 2 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443 Pin Descriptions 44 PINS I/O† DESCRIPTION NAME NO. I/O† DESCRIPTION A0 A1 A2 A3 A4 A5 A6 A7 34 35 36 37 38 39 40 41 I/O Port A is a general-purpose bidirectional I / O port. D3 D4/CP4 D5/CP1 D6/CP6 D7/CP5 27 14 15 12 13 I/O Port D is a general-purpose bidirectional port. Also configurable as SYSCLK (see Note 1) PACT input capture 4 (see Note 2) PACT input capture 1 (see Note 2) PACT input capture 6 (see Note 2) PACT input capture 5 (see Note 2) AN0/E0 AN1/E1 AN2/E2 AN3/E3 AN4/E4 AN5/E5 AN6/E6 AN7/E7 4 5 6 7 8 9 10 11 I ADC1 analog input pins (AN0 – AN7) / port E digital input pins (E0 – E7) Port E can be programmed individually as a general-purpose digital input pin if it is not used as ADC1 analog input or positive reference input. INT1 28 I External interrupt (non-maskable or maskable) / general-purpose input pin OP1/CP3 OP2/CP2 OP3 OP4 OP5 OP6 OP7 OP8 16 17 21 22 23 24 25 26 O PACT PWM output 1/input capture 3 (see Note 3) PACT output pin 2/input capture 2 (see Note 3) PACT PWM output 3 PACT PWM output 4 PACT PWM output 5 PACT PWM output 6 PACT PWM output 7 PACT PWM output 8 SCIRXD SCITXD 19 20 I O PACT mini SCI data receive input pin PACT mini SCI data transmit output pin SPISOMI SPISIMO SPICLK 30 29 31 I/O SPI slave output pin, master input pin / general-purpose bidirectional pin SPI slave input pin, master output pin / general-purpose bidirectional pin SPI bidirectional serial clock pin / general-purpose bidirectional pin RESET 32 I/O System reset bidirectional pin; as input pin, RESET initializes the microcontroller; as open-drain output, RESET indicates that an internal failure was detected by watchdog or oscillator fault circuit. MC 33 I Mode control input pin; enables EEPROM write protection override (WPO) mode, also EPROM VPP XTAL2 / CLKIN XTAL1 43 44 I O Internal oscillator crystal input / External clock source input Internal oscillator output for crystal VCC1 VSS1 VCC3 VSS3 VCCSTBY 1 18 2 3 42 Positive supply voltage for digital logic and digital I/O pins Ground reference for digital logic and digital I/O pins ADC1 positive supply voltage and optional positive reference input ADC1 ground supply and low reference input pin Positive supply voltage pin for standby RAM † I = input, O = output NOTES: 1. D3 can be configured as SYSCLK by appropriately programming the DPORT1 and DPORT2 registers. 2. These digital I/O buffers are connected internally to some of the PACT module’s input capture pins. This allows the microcontroller to read the level on the input capture pin, or if the port D pin is configured as an output, to generate a capture. Be careful to leave the port D pin configured as an input if the corresponding input capture pin is being driven by external circuitry. 3. CP2 and CP3 are connected internally to OP2 and OP1. CP2 and CP3 can be used only to capture OP2 and OP1, respectively and not as external capture inputs. |
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