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TMS320C10-25 Datasheet(PDF) 2 Page - Texas Instruments |
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TMS320C10-25 Datasheet(HTML) 2 Page - Texas Instruments |
2 / 146 page DEVICE SPRS009C – JANUARY 1987 – REVISED JULY 1991 TMS320C1x DIGITAL SIGNAL PROCESSORS POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 2 Table 1 provides an overview of ′C1x processors with comparisons of memory, I/O, cycle timing, military support, and package types. For specific availability, contact the nearest TI Field Sales Office. Table 1. TMS320C1x Device Overview MEMORY I/O CYCLE PACKAGE (1) RAM ROM EPROM PROG. SERIAL PARALLEL (ns) DIP PLCC CER-QUAD TMS320C10 (2) 144 1.5K — 4K — 8 × 16 200 40 44 — TMS320C10-14 144 1.5K — 4K — 8 × 16 280 40 44 — TMS320C10-25 144 1.5K — 4K — 8 × 16 160 40 44 — TMS320C14 (3) 256 4K — 4K 1 7 × 16 (4) 160 — 68 — TMS320E14 (3) 256 — 4K 4K 1 7 × 16 (4) 160 — — 68 CER TMS320P14† 256 — 4K 4K 1 7 × 16 (4) 160 — 68 — TMS320C15 (3) 256 4K — 4K — 8 × 16 200 40 44 — TMS320C15-25 256 4K — 4K — 8 × 16 160 40 44 — TMS320E15 (3) 256 — 4K 4K — 8 × 16 200 40 — 44 CER TMS320E15-25 256 — 4K 4K — 8 × 16 160 40 — 44 CER TMS320LC15 256 4K — 4K — 8 × 16 250 40 44 — TMS320P15† 256 — 4K 4K — 8 × 16 200 40 44 — TMS320C16 256 8K — 64K — 8 × 16 114 — — 64 QFP TMS320C17 256 4K — — 2 6 × 16 (5) 200 40 44 — TMS320E17 (5) 256 — 4K — 2 6 × 16 (5) 200 40 — 44 CER TMS320LC17 (5) 256 4K — — 2 6 × 16 (5) 278 40 44 — TMS320P17 (5)† 256 — 4K — 2 6 × 16 (5) 200 40 44 † One-time programmable (OTP) device is in a windowless plastic package and cannot be erased. NOTES: 1. DIP = dual in-line package. PLCC = plastic-leaded chip carrier. CER = ceramic-leaded chip carrier. QFP = plastic quad flat pack. 2. Military version available. 3. Military versions planned; contact nearest TI Field Sales Office for availability. 4. On-chip 16-bit I/O, four capture inputs, and six compare outputs are available. 5. On-chip 16-bit coprocessor interface is optional by pin selection. |
Similar Part No. - TMS320C10-25 |
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Similar Description - TMS320C10-25 |
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