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PQ60280FTF26NRS-G Datasheet(PDF) 11 Page - SynQor Worldwide Headquarters |
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PQ60280FTF26NRS-G Datasheet(HTML) 11 Page - SynQor Worldwide Headquarters |
11 / 14 page Product # PQ60280FTA26 Phone 1-888-567-9596 www.synqor.com Doc.# 005-2FT628P Rev. C 5/21/08 Page 11 T Technical S echnical Specification pecification Input: Input: Output: Output: Current: Current: PPackage: ackage: 36-75 V 36-75 V 28 V 28 V 26 A 26 A Full-brick Full-brick To increase the output voltage, the user should connect a resistor between Pin 7 and Pin 8 (SENSE(+) input). For a desired increase of the nominal output voltage, the value of the resistor should be Figure C graphs the relationship between the trim resistor value and Rtrim-up and Rtrim-down, showing the total range the output voltage can be trimmed up or down. Figure C: Trim Graph for 28Vout module Note: the TRIM feature does not affect the voltage at which the output over-voltage protection circuit is triggered. Trimming the output voltage too high may cause the over-voltage protection cir- cuit to engage, particularly during transients. It is not necessary for the user to add capacitance at the Trim pin. The node is internally bypassed to eliminate noise. Total DC Variation of Vout: For the converter to meet its full specifications, the maximum variation of the DC value of Vout, due to both trimming and remote load voltage drops, should not be greater than that specified for the output voltage trim range. Current Share (pin 9): The active current share feature allows for N+1 and parallel applications. To achieve load sharing, directly connect the I share pins of multiple units. The load current will share equally among the multiple units. It is important that the Vin(-) pins of the sharing units be directly connected and NOT placed outside of an EMI filter or other impedance path. The volt- age at the I Share pin will range from 1 to 2.4 volts (at full rated current), referenced to the primary-side ground, Vin(-) SYNCHRONIZATION: The converter’s switching frequency can be synchronized to an external frequency source that is in the 270 kHz to 330 kHz range. A pulse train at the desired fre- quency should be applied to the SYNC IN pin (pin 1) with respect to the INPUT RETURN (pin 6). Its frequency can be any- where in that range, regardless of the natural frequency of the power converter. This pulse train should have a duty cycle in the 20% to 80% range. Its low value should be below 0.8V to be guaranteed to be interpreted as a logic low, and its high value should be above 2.0V to be guaranteed to be interpreted as a logic high. The transition time between the two states should be less than 300ns. If the converter is not to be synchronized, the SYNC IN pin should be left open circuit. The converter will then operate in its free-running mode at a frequency of approximately 300 kHz. The converter also has a SYNC OUT pin (pin 2). The pulse train coming out of SYNC OUT has a frequency that matches the switching frequency of the converter with which it is associated. This frequency is either the free-running frequency if there is no synchronization signal at the SYNC IN pin, or the synchroniza- tion frequency if there is. 1 10 100 1,000 10,000 100,000 1,000,000 0 5 10 15 20 25 30 35 40 45 50 % Increase in Vout % Decrease in Vout (k W) Rtrim-up = 16000 + 158.4 x (VDES - VNOM) VDES - VNOM |
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