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MQFL-28-15D Datasheet(PDF) 11 Page - SynQor Worldwide Headquarters |
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MQFL-28-15D Datasheet(HTML) 11 Page - SynQor Worldwide Headquarters |
11 / 18 page Product # MQFL-28-15D Phone 1-888-567-9596 www.synqor.com Doc.# 005-2MQ150D Rev. A 10/23/07 Page 11 T T T Te e e ec c c ch h h hn n n niiiic c c ca a a allll S S S Sp p p pe e e ec c c ciiiiffffiiiic c c ca a a attttiiiio o o on n n n BASIC OPERATION AND FEATURES The MQFL DC/DC converter uses a two-stage power conversion topology. The first, or regulation, stage is a buck-converter that keeps the output voltage constant over variations in line, load, and temperature. The second, or isolation, stage uses transform- ers to provide the functions of input/output isolation and voltage transformation to achieve the output voltage required. In the dual output converter there are two secondary windings in the transformer of the isolation stage, one for each output. There is only one regulation stage, however, and it is used to control the positive output. The negative output therefore displays “Cross-Regulation”, meaning that its output voltage depends on how much current is drawn from each output. Both the positive and the negative outputs share a common OUT- PUT RETURN pin. Both the regulation and the isolation stages switch at a fixed fre- quency for predictable EMI performance. The isolation stage switches at one half the frequency of the regulation stage, but due to the push-pull nature of this stage it creates a ripple at dou- ble its switching frequency. As a result, both the input and the output of the converter have a fundamental ripple frequency of about 550 kHz in the free-running mode. Rectification of the isolation stage’s output is accomplished with synchronous rectifiers. These devices, which are MOSFETs with a very low resistance, dissipate far less energy than would Schottky diodes. This is the primary reason why the MQFL con- verters have such high efficiency, particularly at low output volt- ages. Besides improving efficiency, the synchronous rectifiers permit operation down to zero load current. There is no longer a need for a minimum load, as is typical for converters that use diodes for rectification. The synchronous rectifiers actually permit a neg- ative load current to flow back into the converter’s output termi- nals if the load is a source of short or long term energy. The MQFL converters employ a “back-drive current limit” to keep this negative output terminal current small. There is a control circuit on both the input and output sides of the MQFL converter that determines the conduction state of the power switches. These circuits communicate with each other across the isolation barrier through a magnetically coupled device. No opto-isolators are used. A separate bias supply provides power to both the input and out- put control circuits. Among other things, this bias supply permits the converter to operate indefinitely into a short circuit and to avoid a hiccup mode, even under a tough start-up condition. An input under-voltage lockout feature with hysteresis is provided, as well as an input over-voltage shutdown. There is also an out- put current limit that is nearly constant as the load impedance decreases to a short circuit (i.e., there is not fold-back or fold-for- ward characteristic to the output current under this condition). When a load fault is removed, the output voltage rises exponen- tially to its nominal value without an overshoot. The MQFL converter’s control circuit does not implement an out- put over-voltage limit or an over-temperature shutdown. The following sections describe the use and operation of addi- tional control features provided by the MQFL converter. CONTROL FEATURES ENABLE: The MQFL converter has two enable pins. Both must have a logic high level for the converter to be enabled. A logic low on either pin will inhibit the converter. The ENA1 pin (pin 4) is referenced with respect to the converter’s input return (pin 2). The ENA2 pin (pin 12) is referenced with respect to the converter’s output return (pin 8). This permits the converter to be inhibited from either the input or the output side. Regardless of which pin is used to inhibit the converter, the reg- ulation and the isolation stages are turned off. However, when the converter is inhibited through the ENA1 pin, the bias supply is also turned off, whereas this supply remains on when the con- verter is inhibited through the ENA2 pin. A higher input standby current therefore results in the latter case. Output: Output: Current: Current: ± ±15 V 15 V 8 A Total 8 A Total MQFL-28-15D MQFL-28-15D 2N3904 1N4148 250K 125K 82K 5.6V TO ENABLE CIRCUITRY PIN 4 (or PIN 12) PIN 2 (or PIN 8) IN RTN ENABLE Figure A: Equivalent circuit looking into either the ENA1 or ENA2 pins with respect to its corresponding return pin. |
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