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TLC339QN Datasheet(PDF) 7 Page - Texas Instruments |
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TLC339QN Datasheet(HTML) 7 Page - Texas Instruments |
7 / 17 page TLC139, TLC339, TLC339Q LinCMOS ™ MICROPOWER QUAD COMPARATORS SLCS119 – DECEMBER 1986 – REVISED JANUARY 1991 7 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 switching characteristics, VDD = 5 V, TA = 25°C (see Figure 3) PARAMETER TEST CONDITIONS TLC139M, TLC339C TLC339I, TLC339M TLC339Q UNIT MIN TYP MAX Overdrive = 2 mV 4.5 f10 kH Overdrive = 5 mV 2.5 tPLH Propagation delay time low to high output f = 10 kHz, CL =15 pF Overdrive = 10 mV 1.7 µs tPLH Propagation delay time, low-to-high output CL = 15 F Overdrive = 20 mV 1.2 µs Overdrive = 40 mV 1.0 VI = 1.4 V step at IN+ 1.1 Overdrive = 2 mV 3.6 f10 kH Overdrive = 5 mV 2.1 tPHL Propagation delay time high to low level output f = 10 kHz, CL =15 pF Overdrive = 10 mV 1.3 µs tPHL Propagation delay time, high-to-low level output CL = 15 F Overdrive = 20 mV 0.85 µs Overdrive = 40 mV 0.55 VI = 1.4 V step at IN+ 0.10 tTHL Transition time high to low level output f = 10 kHz, Overdrive = 50 mV 20 ns tTHL Transition time, high-to-low level output CL = 15pF Overdrive = 50 mV 20 ns PARAMETER MEASUREMENT INFORMATION The TLC139 and TLC339 contain a digital output stage that, if held in the linear region of the transfer curve, can cause damage to the device. Conventional operational amplifier/comparator testing incorporates the use of a servo-loop that is designed to force the device output to a level within this linear region. Since the servo-loop method of testing cannot be used, the following alternatives for testing parameters such as input offset voltage, common-mode rejection, etc., are suggested. To verify that the input offset voltage falls within the limits specified, the limit value is applied to the input as shown in Figure 1(a). With the noninverting input positive with respect to the inverting input, the output should be high. With the input polarity reversed, the output should be low. A similar test can be made to verify the input offset voltage at the common-mode extremes. The supply voltages can be slewed as shown in Figure 1(b) for the VICR test, rather than changing the input voltages, to provide greater accuracy. (a) VIO WITH VIC = 0 V (b) VIO WITH VIC = 4 V 5 V 1 V 5.1 k Ω 5.1 k Ω Applied VIO Limit Applied VIO Limit VO VO –4 V Figure 1. Method for Verifying That Input Offset Voltage Is Within Specified Limits |
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