SN75LVDS83

FLATLINK

™ TRANSMITTER

SLLS271B – MARCH 1997 – REVISED NOVEMBER 1999

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POST OFFICE BOX 655303

227.5 Million Bytes per Second Throughput

Data Transmission From Controller to

Display With Very Low EMI

TTL

Low-Voltage Differential

250 mW (Typ)

Inputs

Package With 20-Mil Terminal Pitch

Range . . . 31 MHz to 68 MHz

of ANSI EIA/TIA-644 Standard

description

The SN75LVDS83 FlatLink transmitter contains

four 7-bit parallel-load serial-out shift registers, a

7

× clock synthesizer, and five low-voltage

differential-signaling (LVDS) line drivers in a single integrated circuit. These functions allow 28 bits of

single-ended low-voltage TTL (LVTTL) data to be synchronously transmitted over five balanced-pair conductors

for receipt by a compatible receiver, such as the SN75LVDS82. The SN75LVDS83 can also be used in 21-bit

links with the SN75LVDS86 receiver.

When transmitting, data bits D0 through D27 are each loaded into registers upon the edge of the input clock

signal (CLKIN). The rising or falling edge of the clock can be selected by way of the clock select (CLKSEL)

terminal. The frequency of CLKIN is multiplied seven times (7

×) and then used to unload the data registers in

7-bit slices and serially. The four serial streams and a phase-locked clock (CLKOUT) are then output to LVDS

output drivers. The frequency of CLKOUT is the same as the input clock, CLKIN.

The SN75LVDS83 requires no external components and little or no control. The data bus appears the same

at the input to the transmitter and output of the receiver with the data transmission transparent to the user. The

only user intervention is the possible use of the shutdown/clear (SHTDN) active-low input to inhibit the clock

and shut off the LVDS output drivers for lower power consumption. A low-level signal on SHTDN clears all

internal registers to a low level.

The SN75LVDS83 is characterized for operation over free-air temperature ranges of 0

_C to 70_C.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

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D5

D6

D7

GND

D8

D9

D10

D11

D12

D13

GND

D14

D15

D16

CLKSEL

D17

D18

D19

GND

D20

D21

D22

D23

D24

D25

D4

D3

D2

GND

D1

D0

D27

LVDSGND

Y0M

Y0P

Y1M

Y1P

LVDSGND

Y2M

Y2P

CLKOUTM

CLKOUTP

Y3M

Y3P

LVDSGND

PLLGND

PLLGND

SHTDN

CLKIN

D26

GND

DGG PACKAGE

(TOP VIEW)

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

Copyright

© 1999, Texas Instruments Incorporated

FlatLink is a registered trademark of Texas Instruments Incorporated.