AND-TFT-35XS-LED

Purdy Electronics Corporation • 720 Palomar Avenue • Sunnyvale, CA 94085

1/28/08

Tel: 408.523.8200 • Fax: 408.733.1287 • sales@purdyelectronics.com • www.purdyelectronics.com

3

Interface Pin Assignment

Pin No.

Symbol

Function

Input/Output

Remark

1

STH1

Start pulse for source driver

I/O

Note 1

2

Analog GND for source driver

I

–

3

Analog power input for source driver

I

Note 2

4

Video Input B

I

Note 4

5

Video Input G

I

Note 4

6

Video Input R

I

Note 4

7

VSS

Digital GND

I

8

Digital power input

I

Note 3

9

CPH1

Sampling and shift clock for source driver

I

10

CPH2

Sampling and shift clock for source driver

I

11

CPH3

Sampling and shift clock for source driver

I

12

STH2

Start pulse for source driver

I/O

Note 1

13

Q2H

Video input rotation control

I

14

INH

Output enable for source driver

I

15

R/L

Left/Right Control for source driver

I

16

Common electrode voltage

I

Note 4

17

Common electrode voltage

I

Note 4

18

XOE

Output enable for gate driver

I

19

CPV

Clock input for gate driver

I

20

U/D

Up/Down Control for gate driver

I

21

DIO2

Vertical start pulse

I/O

Note 5

22

DIO1

Vertical start pulse

I/O

Note 5

23

Gate off voltage (alternative every 1-H)

I

Note 4

24

Gate driver negative voltage

I

Note 6

25

GND

I

26

Logic power for gate driver

I

Note 3

27

Gate on voltage

I

Note 7

28

NC

No connection

–

Note 1: STHL, STHR and R/L mode

R/L

STHL

STHR

Remarks

High (VDD)

Input

Output

Left to Right

Low (0 Volt.)

Output

Input

Right to Left

Note 5: Dio1, DIO2 and U/D mode

U/D

DIO1

DIO2

Remarks

High (VDD)

Input

Output

Down to Up

Low (0 Volt.)

Output

Input

Up to Down