155Mbps Spring Latch SFP Transceiver

15～80 km transmission

May 12, 2006

Fiberxon Proprietary and Confidential, Do Not Copy or Distribute

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Controlled Electronic Version. 24hrs Obsolete when printed out without authorization. Last printed 2006-05-15 10:28

(>0.8V, <2.0V):

Undefined

High (2.0~3.465V):

Transmitter Disabled

Open:

Transmitter Disabled

3. MOD-DEF 0,1,2 are the module definition pins. They should be pulled up with a 4.7k~10k

Ω resistor on

the host board. The pull-up voltage shall be VccT or VccR.

MOD-DEF 0 grounded by the module indicates that the module is present

MOD-DEF 1 is the clock line of two-wire serial interface for serial ID

MOD-DEF 2 is the data line of two-wire serial interface for serial ID

4. LOS is an open collector output, which should be pulled up with a 4.7k~10k

Ω resistor on the host board to

a voltage between 2.0V and Vcc+0.3V. Logic 0 indicates normal operation; logic 1 indicates loss of signal.

In the low state, the output will be pulled to less than 0.8V.

5. These are the differential receiver outputs. They are internally AC-coupled 100Ω differential lines which

should be terminated with 100Ω (differential) at the user SERDES.

6. These are the differential transmitter inputs. They are AC-coupled, differential lines with 100Ω differential

termination inside the module.

Mechanical Design Diagram

The mechanical design diagram is shown in Figure 4.

55.7± 0.1

41.8± 0.15

45.0± 0.2

34.6± 0.1

LABEL

Tx

6.25± 0.05

Rx

Figure 4, Mechanical Design Diagram of the SFP with Spring-Latch

Ordering information