SN74ALVCHG162282

18-BIT TO 36-BIT REGISTERED BUS EXCHANGER

WITH 3-STATE OUTPUTS

SCES094C – FEBRUARY 1997 – REVISED JUNE 1999

1

POST OFFICE BOX 655303

Widebus

™ Family

CMOS) Sub-Micron Process

Series Resistors and B-Port Outputs Have

Equivalent 20-

Ω Series Resistors, So No

External Resistors Are Required

MIL-STD-883, Method 3015; Exceeds 200 V

Using Machine Model (C = 200 pF, R = 0)

JESD 17

Need for External Pullup/Pulldown

Resistors

Package

NOTE: For order entry:

The DBB package is abbreviated to G.

For tape and reel:

The DBBR package is abbreviated to GR.

description

The SN74ALVCHG162282 is an 18-bit to 36-bit

registered bus exchanger. This device is intended

for use in applications where data must be

transferred from a narrow high-speed bus to a

wide

lower-frequency

bus.

It

is

designed

The device provides synchronous data exchange

between the two ports. Data is stored in the

internal registers on the low-to-high transition of

the clock (CLK) input. For data transfer in the

B-to-A direction, the select (SEL) input selects 1B

or 2B data for the A outputs.

For data transfer in the A-to-B direction, a

two-stage pipeline is provided in the 1B path, with

a single storage register in the 2B path. Data flow

is controlled by the active-low output-enable (OE)

and direction-control (DIR) input. DIR is registered

to synchronize the bus direction changes with the

clock.

Copyright

© 1999, Texas Instruments Incorporated

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

Widebus and EPIC are trademarks of Texas Instruments Incorporated.

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GND

2B9

1B9

2B8

GND

1B8

2B7

1B7

2B6

1B6

2B5

1B5

GND

2B4

1B4

2B3

1B3

GND

2B2

1B2

2B1

1B1

A1

A2

A3

GND

A4

A5

A6

A7

A8

A9

GND

CLK

SEL

GND

1B10

2B10

1B11

GND

2B11

1B12

2B12

1B13

2B13

1B14

2B14

GND

1B15

2B15

1B16

2B16

GND

1B17

2B17

1B18

2B18

A18

A17

A16

GND

A15

A14

A13

A12

A11

A10

GND

OE

DIR

DBB PACKAGE

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