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LTC2217IUP Datasheet(PDF) 6 Page - Linear Technology |
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LTC2217IUP Datasheet(HTML) 6 Page - Linear Technology |
6 / 32 page LTC2217 6 2217f SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS VDD Analog Supply Voltage (Note 8) ● 3.135 3.3 3.465 V PSHDN Shutdown Power SHDN = VDD 17 mW Standard LVDS Output Mode OVDD Output Supply Voltage (Note 8) ● 3 3.3 3.6 V IVDD Analog Supply Current ● 365 430 mA IOVDD Output Supply Current ● 75 90 mA PDIS Power Dissipation ● 1450 1716 mW Low Power LVDS Output Mode OVDD Output Supply Voltage (Note 8) ● 3 3.3 3.6 V IVDD Analog Supply Current ● 363 430 mA IOVDD Output Supply Current ● 42 50 mA PDIS Power Dissipation ● 1335 1584 mW CMOS Output Mode OVDD Output Supply Voltage (Note 8) ● 0.5 3.6 V IVDD Analog Supply Current ● 360 430 mA PDIS Power Dissipation ● 1190 1420 mW POWER REQUIREMENTS The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. AIN = –1dBFS unless otherwise noted. (Note 4) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS fS Sampling Frequency (Note 8) ● 1 105 MHz tL ENC Low Time Duty Cycle Stabilizer Off (Note 7) Duty Cycle Stabilizer On (Note 7) ● ● 4.52 3.1 4.762 4.762 500 500 ns ns tH ENC High Time Duty Cycle Stabilizer Off (Note 7) Duty Cycle Stabilizer On (Note 7) ● ● 4.52 3.1 4.762 4.762 500 500 ns ns LVDS Output Mode (Standard and Low Power) tD ENC to DATA Delay (Note 7) ● 1.3 2.5 3.8 ns tC ENC to CLKOUT Delay (Note 7) ● 1.3 2.5 3.8 ns tSKEW DATA to CLKOUT Skew (tC-tD) (Note 7) ● –0.6 0 0.6 ns tRISE Output Rise Time 0.5 ns tFALL Output Fall Time 0.5 ns Data Latency Data Latency 7 Cycles CMOS Output Mode tD ENC to DATA Delay (Note 7) ● 1.3 2.7 4 ns tC ENC to CLKOUT Delay (Note 7) ● 1.3 2.7 4 ns tSKEW DATA to CLKOUT Skew (tC-tD) (Note 7) ● –0.6 0 0.6 ns Data Latency Data Latency Full Rate CMOS Demuxed 7 7 Cycles Cycles The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 4) TIMING CHARACTERISTICS |
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