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SN65LVDS9637A Datasheet(PDF) 7 Page - Texas Instruments |
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SN65LVDS9637A Datasheet(HTML) 7 Page - Texas Instruments |
7 / 14 page SN65LVDS32A, SN65LVDT32A, SN65LVDS3486A SN65LVDT3486A, SN65LVDS9637A, SN65LVDT9637A HIGH-SPEED DIFFERENTIAL RECEIVERS SLLS368C – JULY 1999 – REVISED JANUARY 2000 7 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 PARAMETER MEASUREMENT INFORMATION Table 1. Receiver Minimum and Maximum Fail-Safe Input Threshold Test Voltages APPLIED VOLTAGES† RESULTANT INPUTS VIA (mV) VIB (mV) VID (mV) VIC (mV) Output –2050 –1950 –100 –2000 L –2035 –1965 –70 –2000 H 4350 4450 –100 4400 L 4365 4435 –70 4400 H † These voltages are applied for a minimum of 1 µs. VID VO VIB VIA CL = 10 pF tPHL tPLH tf tr 80% 20% 80% 20% VIA VIB VID VO tD1 tD2 1.4 V 1 V 0.4 V 0 V –0.4 V VOH 1.4 V VOL –0.2 V >1 µs NOTE A: All input pulses are supplied by a generator having the following characteristics: tr or tf ≤ 1 ns, Pulse Repetition Rate (PRR) = 50 Mpps, Pulsewidth = 10 ± 0.2 ns . CL includes instrumentation and fixture capacitance within 0,06 mm of the D.U.T. Figure 3. Timing Test Circuit and Waveforms |
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