SN64BCT244

OCTAL BUFFER/DRIVER

WITH 3-STATE OUTPUTS

SCBS027A – FEBRUARY 1989 – REVISED JANUARY 1994

Copyright

3–1

POST OFFICE BOX 655303

Buffer-Memory Address Registers

and Power Down

Small-Outline (DW) Packages and Standard

Plastic 300-mil DIPs (N)

description

This octal buffer and line driver is designed

specifically to improve both the performance and

density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. Taken

together with the SN64BCT240 and SN64BCT241, these devices provide the choice of selected combinations

of inverting and noninverting outputs, symmetrical active-low output-enable (OE) inputs, and complementary

OE and OE inputs.

The SN64BCT244 is organized as two 4-bit buffers/line drivers with separate output-enable (OE) inputs. When

OE is low, the device passes data from the A inputs to the Y outputs. When OE is high, the outputs are in the

high-impedance state.

The outputs are in a high-impedance state during power up and power down while the supply voltage is less

than approximately 3 V.

The SN64BCT244 is characterized for operation from – 40

°C to 85°C.

FUNCTION TABLE

(each buffer)

INPUTS

OUTPUT

OE

A

Y

L

H

H

L

LL

H

X

Z

1

2

3

4

5

6

7

8

9

10

20

19

18

17

16

15

14

13

12

11

1OE

1A1

2Y4

1A2

2Y3

1A3

2Y2

1A4

2Y1

GND

2OE

1Y1

2A4

1Y2

2A3

1Y3

2A2

1Y4

2A1

DW OR N PACKAGE

(TOP VIEW)

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.