SN74LVTH2245 datasheet(1/7 Pages) TI

Part #	SN74LVTH2245

Description	3.3-V ABT OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS

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SN54LVTH2245, SN74LVTH2245

3.3-V ABT OCTAL BUS TRANSCEIVERS

WITH 3-STATE OUTPUTS

SCBS707C – SEPTEMBER 1997 – REVISED APRIL 1999

1

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

D State-of-the-Art Advanced BiCMOS

Technology (ABT) Design for 3.3-V

Operation and Low Static-Power

Dissipation

D B-Port Outputs Have Equivalent 22-Ω

Series Resistors, So No External Resistors

Are Required

D Ioff and Power-Up 3-State Support Hot

Insertion

D Bus Hold on Data Inputs Eliminates the

Need for External Pullup/Pulldown

Resistors

D Support Mixed-Mode Signal Operation (5-V

Input and Output Voltages With 3.3-V VCC)

D Support Unregulated Battery Operation

Down to 2.7 V

D Typical VOLP (Output Ground Bounce)

< 0.8 V at VCC = 3.3 V, TA = 25°C

D Latch-Up Performance Exceeds 500 mA Per

JESD 17

D ESD Protection Exceeds 2000 V Per

MIL-STD-883, Method 3015; Exceeds 200 V

Using Machine Model (C = 200 pF, R = 0)

D Package Options Include Plastic

Small-Outline (DW), Shrink Small-Outline

(DB), and Thin Shrink Small-Outline (PW)

Packages, Ceramic Chip Carriers (FK),

Ceramic Flat (W) Packages, and Ceramic

(J) DIPs

description

These octal bus transceivers are designed specifically for low-voltage (3.3-V) VCC operation, but with the

capability to provide a TTL interface to a 5-V system environment.

These devices are designed for asynchronous communication between data buses. They transmit data from

the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR)

input. The output-enable (OE) input can be used to disable the devices so the buses are effectively isolated.

Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.

The B-port outputs, which are designed to source or sink up to 12 mA, include equivalent 22-

Ω series resistors

to reduce overshoot and undershoot.

When VCC is between 0 and 1.5 V, the devices are in the high-impedance state during power up or power down.

However, to ensure the high-impedance state above 1.5 V, OE should be tied to VCC through a pullup resistor;

the minimum value of the resistor is determined by the current-sinking capability of the driver.

Copyright

UNLESS OTHERWISE NOTED this document contains PRODUCTION

DATA information current as of publication date. Products conform to

specifications per the terms of Texas Instruments standard warranty.

Production processing does not necessarily include testing of all

parameters.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

SN54LVTH2245 ...J OR W PACKAGE

SN74LVTH2245 . . . DB, DW, OR PW PACKAGE

(TOP VIEW)

32

1 20 19

9 10 11 12 13

4

5

6

7

8

18

17

16

15

14

B1

B2

B3

B4

B5

A3

A4

A5

A6

A7

SN54LVTH2245 . . . FK PACKAGE

(TOP VIEW)

1

2

3

4

5

6

7

8

9

10

20

19

18

17

16

15

14

13

12

11

DIR

A1

A2

A3

A4

A5

A6

A7

A8

GND

VCC

OE

B1

B2

B3

B4

B5

B6

B7

B8

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