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SN54LVT125FK Datasheet(PDF) 1 Page - Texas Instruments |
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SN54LVT125FK Datasheet(HTML) 1 Page - Texas Instruments |
1 / 7 page SN54LVT125, SN74LVT125 3.3-V ABT QUADRUPLE BUS BUFFERS WITH 3-STATE OUTPUTS SCBS133D – MAY 1992 – REVISED JULY 1995 1 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 D State-of-the-Art Advanced BiCMOS Technology (ABT) Design for 3.3-V Operation and Low-Static Power Dissipation D Support Mixed-Mode Signal Operation (5-V Input and Output Voltages With 3.3-V VCC) D Support Unregulated Battery Operation Down to 2.7 V D Typical VOLP (Output Ground Bounce) < 0.8 V at VCC = 3.3 V, TA = 25°C D ESD Protection Exceeds 2000 V Per MIL-STD-883C, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0) D Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17 D Bus-Hold Data Inputs Eliminate the Need for External Pullup Resistors D Support Live Insertion D Package Options Include Plastic Small-Outline (D), Shrink Small-Outline (DB), and Thin Shrink Small-Outline (PW) Packages, Ceramic Chip Carriers (FK), and Ceramic (J) DIPs description These bus buffers are designed specifically for low-voltage (3.3-V) VCC operation, but with the capability to provide a TTL interface to a 5-V system environment. The ′LVT125 feature independent line drivers with 3-state outputs. Each output is in the high-impedance state when the associated output-enable (OE) input is high. Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. The SN74LVT125 is available in TI’s shrink small-outline package (DB), which provides the same I/O pin count and functionality of standard small-outline packages in less than half the printed-circuit-board area. The SN54LVT125 is characterized for operation over the full military temperature range of – 55 °C to 125°C. The SN74LVT125 is characterized for operation from – 40 °C to 85°C. Copyright © 1995, Texas Instruments Incorporated UNLESS OTHERWISE NOTED this document contains PRODUCTION DATA information current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. SN54LVT125 ...J PACKAGE SN74LVT125 . . . D, DB, OR PW PACKAGE (TOP VIEW) 1 2 3 4 5 6 7 14 13 12 11 10 9 8 1OE 1A 1Y 2OE 2A 2Y GND VCC 4OE 4A 4Y 3OE 3A 3Y 32 1 20 19 910 11 12 13 4 5 6 7 8 18 17 16 15 14 4A NC 4Y NC 3OE 1Y NC 2OE NC 2A SN54LVT125 . . . FK PACKAGE (TOP VIEW) NC – No internal connection Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. |
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