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ADS-933MM Datasheet(PDF) 5 Page - Murata Power Solutions Inc. |
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ADS-933MM Datasheet(HTML) 5 Page - Murata Power Solutions Inc. |
5 / 8 page ADS-933 ® ® 5 LED's to the digital outputs and performing adjustments until certain LED's "flicker" equally between on and off. Other approaches employ digital comparators or microcontrollers to detect when the outputs change from one code to the next. For the ADS-933, offset adjusting is normally accomplished when the analog input is 0 minus ½ LSB (–42µV). See Table 2b for the proper bipolar output coding. Gain adjusting is accomplished when the analog input is at nominal full scale minus 1½ LSB's (+2.749874V). Note: Connect pin 5 to ANALOG GROUND (pin 4) for operation without zero/offset adjustment. Connect pin 6 to pin 4 for operation without gain adjustment. Zero/Offset Adjust Procedure 1. Apply a train of pulses to the START CONVERT input (pin 12) so that the converter is continuously converting. 2. For zero/offset adjust, apply –42µV to the ANALOG INPUT (pin 3). 3. Adjust the offset potentiometer until the code flickers between 1000 0000 0000 0000 and 0111 1111 1111 1111 with pin 35 tied high (complementary offset binary) or between 0111 1111 1111 1111 and 1000 0000 0000 0000 with pin 35 tied low (offset binary). 4. Two's complement coding requires using BIT 1 (MSB) (pin 29). With pin 35 tied low, adjust the trimpot until the output code flickers between all 0’s and all 1’s. Gain Adjust Procedure 1. For gain adjust, apply +2.749874V to the ANALOG INPUT (pin 3). 2. Adjust the gain potentiometer until all output bits are 0’s and the LSB flickers between a 1 and 0 with pin 35 tied high (complementary offset binary) or until all output bits are 1’s and the LSB flickers between a 1 and 0 with pin 35 tied low (offset binary). 3. Two's complement coding requires using BIT 1 (MSB) (pin 29). With pin 35 tied low, adjust the gain trimpot until the output code flickers equally between 0111 1111 1111 1111 and 0111 1111 1111 1110. 4. To confirm proper operation of the device, vary the applied input voltage to obtain the output coding listed in Table 2b. 1111 1111 1111 1111 LSB "1" to "0" 1110 0000 0000 0000 1100 0000 0000 0000 1000 0000 0000 0000 0111 1111 1111 1111 0100 0000 0000 0000 0010 0000 0000 0000 0000 0000 0000 0001 LSB "0" to "1" 0000 0000 0000 0000 OFFSET BINARY MSB LSB MSB LSB MSB LSB MSB LSB +FS –1 LSB +FS –1 1/2 LSB +3/4 FS +1/2 FS 0 –1 LSB –1/2 FS –3/4 FS –FS +1 LSB –FS + 1/2 LSB –FS OUTPUT CODING INPUT RANGE ±2.75V +2.749916 +2.749874 +2.062500 +1.375000 0.000000 –0.000084 –1.375000 –2.062500 –2.749916 –2.749958 –2.750000 0000 0000 0000 0000 LSB "0" to "1" 0001 1111 1111 1111 0011 1111 1111 1111 0111 1111 1111 1111 1000 000 000 0000 1011 1111 1111 1111 1101 1111 1111 1111 1111 1111 1111 1110 LSB "1" to "0" 1111 1111 1111 1111 COMP. OFF. BIN. 0111 1111 1111 1111 LSB "1" to "0" 0110 0000 0000 0000 0100 0000 0000 0000 0000 0000 0000 0000 1111 1111 1111 1111 1100 0000 0000 0000 1010 0000 0000 0000 1000 0000 0000 0001 LSB "0" to "1" 1000 0000 0000 0000 TWO'S COMP. 1000 0000 0000 0000 LSB "0" to "1" 1001 1111 1111 1111 1011 1111 1111 1111 1111 1111 1111 1111 0000 0000 0000 0000 0011 1111 1111 1111 0101 1111 1111 1111 0111 1111 1111 1110 LSB "1" to "0" 0111 1111 1111 1111 COMP. TWO'S COMP. BIPOLAR SCALE Table 2b. Output Coding Complementary Offset Binary 1 Offset Binary 0 Complementary Two’s Complement 1 (Using MSB, pin 29) Two’s Complement 0 (Using MSB, pin 29) OUTPUT FORMAT PIN 35 LOGIC LEVEL Table 2a. Setting Output Coding Selection (Pin 35) Figure 2. Connection Diagram CALIBRATION PROCEDURE Connect the converter per Figure 2. Any offset/gain calibration procedures should not be implemented until the device is fully warmed up. To avoid interaction, adjust offset before gain. The ranges of adjustment for the circuits in Figure 2 are guaranteed to compensate for the ADS-933’s initial accuracy errors and may not be able to compensate for additional system errors. A/D converters are calibrated by positioning their digital outputs exactly on the transition point between two adjacent digital output codes. This is accomplished by connecting ADS-933 20k Ω 33 32 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 OVERFLOW EOC BIT 1 (MSB) BIT 1 (MSB) BIT2 BIT 3 BIT 4 BIT 5 BIT 6 BIT 7 BIT 8 BIT 9 BIT 10 BIT 11 BIT 12 BIT 13 BIT 14 BIT 15 BIT 16 (LSB) ANALOG GROUND DIGITAL GROUND 0.1µF 4.7µF 0.1µF COMP. BITS 4.7µF +3.2V REF. OUT FIFO READ 31 7, 30 35 1 9 +5V DIGITAL –5V +5V OFFSET ADJUST GAIN ADJUST 5 6 3 0.1µF 4.7µF 2, 4, 36 37 0.1µF 4.7µF 38 20k Ω –5V +5V –5V +5V ANALOG 12 START CONVERT ANALOG INPUT 34 ENABLE 8 FIFO/DIR 10 FSTAT1 11 FSTAT2 +5V +5V +5V –5V |
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