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LTC4007-1 Datasheet(PDF) 9 Page - Linear Technology |
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LTC4007-1 Datasheet(HTML) 9 Page - Linear Technology |
9 / 24 page 9 LTC4007-1 40071f TEST CIRCUIT – + – + EA LT1055 LTC4007-1 VREF CHEM 3C4C BAT DIVIDER/ MUX 13 5 12 CSP 11 ITH 0.6V 40071 TC 8 OPERATIO Overview The LTC4007-1 is a synchronous current mode PWM step-down (buck) switcher battery charger controller. The charge current is programmed by the combination of a program resistor (RPROG) from the PROG pin to ground and a sense resistor (RSENSE) between the CSP and BAT pins. The final float voltage is programmed to one of four values (12.3V, 12.6V, 16.4V, 16.8V) with ±1% maximum accuracy using pins 3C4C and CHEM. Charging begins when the potential at the DCIN pin rises above the voltage at BAT (and the UVLO voltage) and the SHDN pin is low; the CHG pin is set low. At the beginning of the charge cycle, if the cell voltage is below 3.25V (3.173V if CHEM is low), the LOBAT pin will be low. The LOBAT indicator can be used to reduce the charging current to a low value, typically 10% of full scale. If the cell voltage stays below 3.25V for 25% of the total charge time, the charge sequence will be terminated immediately and the FAULT pin will be set low. An external thermistor network is sampled at regular intervals. If the thermistor value exceeds design limits, charging is suspended and the FAULT pin is set low. If the thermistor value returns to an acceptable value, charging resumes and the FAULT pin is set high. An external resistor on the RT pin sets the total charge time. The timer can be defeated by forcing the CHG pin to a low voltage. As the battery approaches the final float voltage, the charge current will begin to decrease. When the current drops to 10% of the full-scale charge current, an internal C/10 comparator will indicate this condition by latching the FLAG pin low. The charge timer is also reset to 1/4 of the total charge time when FLAG goes low. If this condition is caused by an input current limit condition, described below, then the FLAG indicator will be inhibited. When a time-out occurs, charging is terminated immediately and the CHG pin is forced to a high impedance state. To restart the charge cycle manually, simply remove the input volt- age and reapply it, or set the SHDN pin high momentarily. When the input voltage is not present, the charger goes into a sleep mode, dropping battery current drain to 15 µA. This greatly reduces the current drain on the battery and increases the standby time. The charger is inhibited any time the SHDN pin is high. Input FET The input FET circuit performs two functions. It enables the charger if the input voltage is higher than the CLN pin and provides the logic indicator of AC present on the ACP pin. It controls the gate of the input FET to keep a low forward voltage drop when charging and also prevents reverse current flow through the input FET. If the input voltage is less than VCLN, it must go at least 170mV higher than VCLN to activate the charger. When this occurs the ACP pin is released and pulled up with an external load to indicate that the adapter is present. The |
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Similar Description - LTC4007-1 |
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