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BQ4010YMA-85N Datasheet(PDF) 4 Page - Texas Instruments |
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BQ4010YMA-85N Datasheet(HTML) 4 Page - Texas Instruments |
4 / 14 page AC Test Conditions Parameter Test Conditions Input pulse levels 0V to 3.0V Input rise and fall times 5 ns Input and output timing reference levels 1.5 V (unless otherwise specified) Output load (including scope and jig) See Figures 1 and 2 Figure 1. Output Load A Figure 2. Output Load B Read Cycle (TA = TOPR, VCCmin ≤ VCC ≤ VCCmax) Symbol Parameter -70/-70N -85/-85N -150/-150N -200 Unit Conditions Min. Max. Min. Max. Min. Max. Min. Max. tRC Read cycle time 70 - 85 - 150 - 200 - ns tAA Address access time - 70 - 85 - 150 - 200 ns Output load A tACE Chip enable access time - 70 - 85 - 150 - 200 ns Output load A tOE Output enable to output valid - 35 - 45 - 70 - 90 ns Output load A tCLZ Chip enable to output in low Z 5- 5- 10 - 10 - ns Output load B tOLZ Output enable to output in low Z 5- 5- 5 - 5 - ns Output load B tCHZ Chip disable to output in high Z 025040 0 60 0 70 ns Output load B tOHZ Output disable to output in high Z 025030 0 50 0 70 ns Output load B tOH Output hold from address change 10 - 10 - 10 - 10 - ns Output load A Sept. 1996 D bq4010/bq4010Y 6-4 |
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