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BQ4011Y-150 Datasheet(PDF) 1 Page - Texas Instruments |
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BQ4011Y-150 Datasheet(HTML) 1 Page - Texas Instruments |
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1 / 13 page  Features ® Data retention in the absence of power ® Automatic write-protection during power-up/power-down cycles ® Industry-standard 28-pin 32K x 8 pinout ® Conventional SRAM operation; unlimited write cycles ® 10-year minimum data retention in absence of power ® Battery internally isolated until power is applied General Description The CMOS bq4011 is a nonvolatile 262,144-bit static RAM organized as 32,768 words by 8 bits. The integral control circuitry and lithium energy source provide reliable nonvolatility coupled with the unlimited write cycles of standard SRAM. The control circuitry constantly monitors the single 5V supply for an out-of-tolerance condition. When VCC falls out of tolerance, the SRAM is unconditionally write-protected to prevent inadvertent write operation. At this time the integral energy source is switched on to sustain the memory until after VCC returns valid. The bq4011 uses an extremely low standby current CMOS SRAM, coupled with a small lithium coin cell to provide nonvolatility without long write-cycle times and the write-cycle limitations associated with EEPROM. The bq4011 requires no external cir- cuitry and is socket-compatible with industry-standard SRAMs and most EPROMs and EEPROMs. Selection Guide Part Number Maximum Access Time (ns) Negative Supply Tolerance Part Number Maximum Access Time (ns) Negative Supply Tolerance bq4011Y-70 70 -10% bq4011 -100 100 -5% bq4011Y -100 100 -10% bq4011 -150 150 -5% bq4011Y -150 150 -10% bq4011 -200 200 -5% bq4011Y -200 200 -10% Pin Names A0 –A14 Address inputs DQ0–DQ7 Data input/output CE Chip enable input OE Output enable input WE Write enable input VCC +5 volt supply input VSS Ground Aug. 1993 C 32Kx8 Nonvolatile SRAM bq4011/bq4011Y Block Diagram Pin Connections 1 |
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