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LTC4151CMS-1-TRPBF Datasheet(PDF) 10 Page - Linear Technology

Part # LTC4151CMS-1-TRPBF
Description  High Voltage I2C Current and Voltage Monitor
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Manufacturer  LINER [Linear Technology]
Direct Link  http://www.linear.com
Logo LINER - Linear Technology

LTC4151CMS-1-TRPBF Datasheet(HTML) 10 Page - Linear Technology

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LTC4151/LTC4151-1
10
41511fa
Using Optoisolators with LTC4151-1
The LTC4151-1 splits the SDA line into SDAI (input)
and SDAO (inverted output) for convenience of opto-
coupling with a host controller that sits at a differ-
ent ground level. When using optoisolators with the
LTC4151-1, connect the SDAI to the output of the
incoming optocoupler and connect the SDAO to the anode
of the outgoing optocoupler (see Figure 9). With the
outgoing optocoupler clamping SDAO and internal 6V
(5.5V minimum) clamps on SDAI and SCL, the pull-up
resistors on these three pins can be directly connected
to VIN. In this way (with SDAO rather than conventional
SDAO), the need for a separate low voltage supply for
pull-ups is eliminated.
Start and Stop Conditions
When the I2C bus is idle, both SCL and SDA must remain
in the high state. A bus master signals the beginning of a
transmission with a Start condition by transitioning SDA
from high to low while SCL stays high. When the master
has finished communicating with the slave, it issues a
Stop condition by transitioning SDA from low to high
while SCL stays high. The bus is then free for another
transmission.
Stuck-Bus Reset
The LTC4151/LTC4151-1 I2C interface features a stuck-
bus reset timer. The low conditions of the SCL and the
SDA/SDAI pins are OR’ed to start the timer. The timer is
reset when both SCL and SDA/SDAI are pulled high. If the
SCL pin or the SDA/SDAI pin is held low for over 33ms,
the stuck-bus timer will expire and the internal I2C state
machine will be reset to allow normal communication after
the stuck-bus condition is cleared. The stuck-bus timer
can be disabled by clearing control register bit G2.
I2C Device Addressing
Nine distinct I2C bus addresses are configurable us-
ing the three-state pins ADR0 and ADR1, as shown in
Table 1. Address bits a6, a5 and a4 are configured to
(110) and the least significant bit is the R/W bit. In addi-
tion, the LTC4151 and LTC4151-1 will respond to a mass
write address (1100 110)b for writing to all LTC4151s
and LTC4151-1s, regardless of their individual address
settings.
APPLICATIONS INFORMATION
Figure 9. Optoisolation of the I2C Interface Between LTC4151-1 and a Microcontroller
41511 F09
3.3V
RS
0.02Ω
μ-Controller
LTC4151-1
SCL
SCL
VIN
48V
VIN
VDD
VADIN
2
3
4
SDAI
ADIN
ADR1
R5
0.51k
R6
10k
R7
10k
R4
0.51k
R1
20k
R2
20k
R3
5.1k
1
8
2
7
3
6
4
5
8
1
7
2
6
3
5
4
6
110
7
8
5
9
SDA
ADR0
GND
SENSE+
SENSE
SDA0
MOCD207M
MOCD207M


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