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LTC4218IDHC-12-TRPBF Datasheet(PDF) 9 Page - Linear Technology

Part # LTC4218IDHC-12-TRPBF
Description  Hot Swap Controller
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Manufacturer  LINER [Linear Technology]
Direct Link  http://www.linear.com
Logo LINER - Linear Technology

LTC4218IDHC-12-TRPBF Datasheet(HTML) 9 Page - Linear Technology

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LTC4218
9
4218fb
OPERATION
The Functional Diagram displays the main circuits of the
device. The LTC4218 is designed to turn a board’s sup-
ply voltage on and off in a controlled manner, allowing
the board to be safely inserted and removed from a live
backplane. During normal operation, the charge pump and
gate driver turn on the external N-channel pass FET’s gate
to provide power to the load.
The current sense (CS) amplifier monitors the load current
using the voltage sensed across the current sense resistor.
The CS amplifier limits the current in the load by reducing
the GATE-to-SOURCE voltage in an active control loop. It
is simple to adjust the current limit threshold using the
current setting (ISET) pin. This allows a different threshold
during other times such as startup.
A short circuit on the output to ground causes significant
power dissipation during active current limiting. To limit
this power, the foldback amplifier reduces the current limit
value from 15mV to 3.75mV (referred to the SENSE+ minus
SENSEvoltage) in a linear manner as the FB pin drops
below 0.6V (see Typical Performance Characteristics).
If an overcurrent condition persists, the TIMER pin ramps
up with a 100μA current source until the pin voltage exceeds
1.2V (comparator TM2). This indicates to the logic that it
is time to turn off the MOSFET to prevent overheating. At
this point the TIMER pin ramps down using the 2μA current
source until the voltage drops below 0.2V (Comparator
TM1) which tells the logic to start an internal 100ms timer.
At this point, the pass transistor has cooled and it is safe
to turn it on again.
The fixed 12V version, LTC4218-12, uses two separate
internal dividers from VDD to drive the UV and OV pins.
This version also features a divider from the SOURCE pin
to drive the FB pin. The LTC4218-12 is available in a DFN
package while the LTC4218 (adjustable version) is in a
SSOP package.
The output voltage is monitored using the FB pin and the
PG comparator to determine if the power is available for
the load. The power good condition is signaled by the PG
pin using an open-drain pull-down transistor.
The Functional Diagram shows the monitoring blocks of
the LTC4218. The comparators on the left side include
the UV and OV comparators. These comparators are used
to determine if the external conditions are valid prior to
turning on the MOSFET. But first, the undervoltage lockout
circuits (UVLO1 and UVLO2) must validate the input supply
and internally generated 3.1V supply (INTVCC) and gener-
ate the power up initialization to the logic circuits. If the
external conditions remain valid for 100ms the MOSFET
is allowed to turn on.
Other monitoring features include the IMONcurrentmonitor.
The current monitor (CM) outputs a current proportional to
the sense resistor current. This current can drive an external
resistor or other circuits for monitoring purposes.


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