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LTC4210-4CS6 Datasheet(PDF) 8 Page - Linear Technology

Part # LTC4210-4CS6
Description  Hot Swap Controller in 6-Lead SOT-23 Package
Download  16 Pages
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Manufacturer  LINER [Linear Technology]
Direct Link  http://www.linear.com
Logo LINER - Linear Technology

LTC4210-4CS6 Datasheet(HTML) 8 Page - Linear Technology

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8
LTC4210-3/LTC4210-4
421034fa
Undervoltage Lockout
An internal undervoltage lockout (UVLO) circuit resets the
LTC4210 if the VCC supply is too low for normal operation.
The UVLO has a low-to-high threshold of 2.5V, a 100mV
hysteresis and a high-to-low glitch filter of 30
µs. Above
2.5V supply voltage, the LTC4210 will start if the ON pin
conditions are met. A short supply dip below 2.4V for less
than 30
µs is ignored to allow for bus supply transients.
ON Function
The ON pin is the input to a comparator which has a low-
to-high threshold of 1.3V, an 80mV hysteresis and a high-
to-low glitch filter of 30
µs. A low input on the ON pin resets
the LTC4210 TIMER status and turns off the external
MOSFET by pulling the GATE pin to ground. A low-to-high
transition on the ON pin starts an initial cycle followed by
a start-up cycle. A 10k pull-up resistor connecting the ON
pin to the supply is recommended. The 10k resistor shunts
any potential static charge on the backplane and reduces
the overvoltage stress at the ON pin during live insertion.
Alternatively, an external resistor divider at the ON pin can
be used to program an undervoltage lockout value higher
than the internal UVLO circuit. An RC filter can be added at
the ON pin to increase the delay time at card insertion if the
internal glitch filter delay is insufficient.
GATE Function
During hot insertion of the PCB, an abrupt application of
supply voltage charges the external MOSFET drain/gate
capacitance. This can cause an unwanted gate voltage
spike. An internal proprietary circuit holds GATE low
before the internal circuitry wakes up. This reduces the
MOSFET current surges substantially at insertion. The
GATE pin is held low in reset mode and during the initial
timing cycle. In the start-up cycle the GATE pin is pulled up
by a 10
µA current source. During an overcurrent fault
condition, the error amplifier servoes the GATE pin to
maintain a constant current to the load until the circuit
breaker trips. When the circuit breaker trips, the GATE pin
shuts down abruptly.
Current Limit Circuit Breaker Function
The LTC4210 features a current limiting circuit breaker
instead of a traditional comparator circuit breaker. When
there is a sudden load current surge, such as a low
impedance fault, the bus supply voltage can drop signifi-
cantly to a point where the power to an adjacent card is
affected, causing system malfunctions. The LTC4210 fast
response error amplifier (EA) instantly limits current by
reducing the external MOSFET GATE pin voltage. This
minimizes the bus supply voltage drop and permits power
budgeting and fault isolation without affecting neighbor-
ing cards. A compensation circuit should be connected to
the GATE pin for current limit loop stability.
Sense Resistor Consideration
The nominal fault current limit is determined by a sense
resistor connected between VCC and the SENSE pin as
given by Equation 1.
I
V
R
mV
R
LIMIT NOM
CB NOM
SENSE NOM
SENSE
()
()
()
(
==
50
N
NOM)
(1)
The power rating of the sense resistor should be rated at
the fault current level.
For proper circuit breaker operation, Kelvin-sense PCB
connections between the sense resistor and the LTC4210
VCC and SENSE pins are strongly recommended. The
drawing in Figure 1 illustrates the connections between
the LTC4210 and the sense resistor. PCB layout should be
balanced and symmetrical to minimize wiring errors. In
addition, the PCB layout for the sense resistor should
include good thermal management techniques for optimal
sense resistor power dissipation.
APPLICATIO S I FOR ATIO
SENSE RESISTOR
CURRENT FLOW
TO LOAD
TRACK WIDTH W:
0.03" PER AMP
ON 1 OZ COPPER
W
TO
VCC
TO
SENSE
4210 F01
CURRENT FLOW
TO LOAD
Figure 1. Making PCB Connections to the Sense Resistor


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