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LTC4090-5 Datasheet(PDF) 9 Page - Linear Technology

Part # LTC4090-5
Description  USB Power Manager with 2A High Voltage Bat-Track Buck Regulator
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Manufacturer  LINER [Linear Technology]
Direct Link  http://www.linear.com
Logo LINER - Linear Technology

LTC4090-5 Datasheet(HTML) 9 Page - Linear Technology

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LTC4090/LTC4090-5
9
4090fa
PIN FUNCTIONS
SYNC (Pin 1): External Clock Synchronization Input. See
synchronizing section in the Applications Information
section. Ground pin when not used.
PG (Pin 2): The PG pin is the open collector output of an
internal comparator. PG remains low until the HVOUT pin
is above 2.8V. PG output is valid when HVIN is above 3.6V
and HVEN is high.
RT (Pin 3): Oscillator Resistor Input. Connecting a resistor
to ground from this pin sets the switching frequency.
VC (Pin 4): High Voltage Buck Regulator Control Pin. The
voltage on this pin controls the peak switch current in the
high voltage regulator. Tie an RC network from this pin to
ground to compensate the control loop.
NTC (Pin 5): Input to the NTC Thermistor Monitoring
Circuits. The NTC pin connects to a negative temperature
coefficient thermistor which is typically co-packaged with
the battery pack to determine if the battery is too hot or too
cold to charge. If the battery temperature is out of range,
charging is paused until the battery temperature re-enters
the valid range. A low drift bias resistor is required from
VNTC to NTC and a thermistor is required from NTC to
ground. If the NTC function is not desired, the NTC pin
should be grounded.
VNTC (Pin 6): Output Bias Voltage for NTC. A resistor from
this pin to the NTC pin will bias the NTC thermistor.
⎯H⎯V⎯P⎯R (Pin 7): High Voltage Present Output (Active Low).
A low on this pin indicates that the high voltage regulator
has sufficient voltage to charge the battery. This feature
is enabled if power is present on HVIN, IN, or BAT (i.e.,
above UVLO thresholds).
⎯C⎯H⎯R⎯G(Pin8):Open-DrainChargeStatusOutput.Whenthe
battery is being charged, the
⎯C⎯H⎯R⎯G pin is pulled low by an
internal N-channel MOSFET. When the timer runs out or
the charge current drops below 10% of the programmed
charge current or the input supply is removed, the
⎯C⎯H⎯R⎯G
pin is forced to a high impedance state.
PROG (Pin 9): Charge Current Program Pin. Connecting
a resistor from PROG to ground programs the charge
current:
IA
V
R
CHG
PROG
()
,
=
50 000
GATE (Pin 10): External Ideal Diode Gate Connection. This
pin controls the gate of an optional external P-channel
MOSFET transistor used to supplement the internal ideal
diode. The source of the P-channel MOSFET should be
connected to OUT and the drain should be connected to
BAT. When not in use, this pin should be left floating. It
is important to maintain high impedance on this pin and
minimize all leakage paths.
BAT (Pin 11): Single-Cell Li-Ion Battery. This pin is used
as an output when charging the battery and as an input
when supplying power to OUT. When the OUT pin potential
drops below the BAT pin potential, an ideal diode function
connects BAT to OUT and prevents OUT from dropping
more than 100mV below BAT. A precision internal resistor
divider sets the final float (charging) potential on this pin.
The internal resistor divider is disconnected when IN and
HVIN are in undervoltage lockout.
IN (Pin 12): Input Supply. Connect to USB supply, VBUS.
Input current to this pin is limited to either 20% or 100%
of the current programmed by the CLPROG pin as deter-
mined by the state of the HPWR pin. Charge current (to the
BAT pin) supplied through the input is set to the current
programmed by the PROG pin but will be limited by the
input current limit if charge current is set greater than the
input current limit or if the sum of charge current plus load
current is greater than the input current limit.
OUT (Pin 13): Voltage Output. This pin is used to provide
controlled power to a USB device from either USB VBUS
(IN), an external high voltage supply (HVIN), or the battery
(BAT) when no other supply is present. The high voltage
supply is prioritized over the USB VBUS input. OUT should
be bypassed with at least 4.7μF to GND.


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