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LTC4088EDE-1-PBF Datasheet(PDF) 8 Page - Linear Technology |
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LTC4088EDE-1-PBF Datasheet(HTML) 8 Page - Linear Technology |
8 / 24 page LTC4088-1/LTC4088-2 8 40881fb CHRG (Pin 7): Open-Drain Charge Status Output. The CHRG pin indicates the status of the battery charger. Four possible states are represented by CHRG: charging, not charging (or float charge current less than programmed end of charge indication current), unresponsive battery and battery temperature out of range. CHRG is modulated at 35kHz and switches between a low and a high duty cycle for easy recognition by either humans or microprocessors. CHRG requires a pull-up resistor and/or LED to provide indication. GATE (Pin 8): Ideal Diode Amplifier Output. This pin controls the gate of an external P-channel MOSFET transistor used to supplement the internal ideal diode. The source of the P-channel MOSFET should be connected to VOUT and the drain should be connected to BAT. BAT (Pin 9): Single Cell Li-Ion Battery Pin. Depending on available power and load, a Li-Ion battery on BAT will either deliver system power to VOUT through the ideal diode or be charged from the battery charger. VOUT (Pin 10): Output voltage of the switching PowerPath controller and input voltage of the battery charger. The majority of the portable product should be powered from VOUT. The LTC4088-1/LTC4088-2 will partition the available power between the external load on VOUT and the internal battery charger. Priority is given to the external load and any extra power is used to charge the battery. An ideal diode from BAT to VOUT ensures that VOUT is powered even PI FU CTIO S if the load exceeds the allotted power from VBUS or if the VBUS power source is removed. VOUT should be bypassed with a low impedance multilayer ceramic capacitor. VBUS (Pin 11): Input voltage for the switching PowerPath controller. VBUS will usually be connected to the USB port of a computer or a DC output wall adapter. VBUS should be bypassed with a low impedance multilayer ceramic capacitor. SW (Pin 12): The SW pin delivers power from VBUS to VOUT via the step-down switching regulator. An inductor should be connected from SW to VOUT. See the Applica- tions Information section for a discussion of inductance value and current rating. D0 (Pin 13): Mode Select Input Pin. D0, in combina- tion with the D1 pin and the D2 pin, controls the current limit and battery charger functions of the LTC4088-1/ LTC4088-2 (see Table 1). This pin is pulled low by a weak current sink. D1 (Pin 14): Mode Select Input Pin. D1, in combination with the D0 pin and the D2 pin, controls the current limit and battery charger functions of the LTC4088-1/LTC4088- 2 (see Table 1). This pin is pulled low by a weak current sink. Exposed Pad (Pin 15): GND. Must be soldered to the PCB to provide a low electrical and thermal impedance connection to ground. |
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Similar Description - LTC4088EDE-1-PBF |
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