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LTC3873EDDB-5-TR Datasheet(PDF) 9 Page - Linear Technology |
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LTC3873EDDB-5-TR Datasheet(HTML) 9 Page - Linear Technology |
9 / 16 page LTC3873-5 9 38735fb VCC Bias Power The VCC pin must be bypassed to the GND pin with a minimum 10μF ceramic or tantalum capacitor located immediately adjacent to the two pins. Proper supply by- passing is necessary to supply the high transient currents required by the MOSFET gate driver. For maximum flexibility, the LTC3873-5 is designed so that it can be operated from voltages well beyond the LTC3873-5’s absolute maximum ratings. In the simplest case, the LTC3873-5 can be powered with a resistor con- nected between the input voltage and VCC.Thebuilt-inshunt regulator limits the voltage on the VCC pin to around 9.3V as long as the shunt regulator is not forced to sink more than 25mA. This powering scheme has the drawback that the power loss in the resistor reduces converter efficiency and the 25mA shunt regulator maximum may limit the maximum-minimum range of input voltage. The circuit in Figure 5 shows a second way to power the LTC3873-5. An external series pre-regulator consisting of series pass transistor Q1, zener diode D1 and bias resis- tor RB brings VCC to at least 7.6V nominal, well above the undervoltage lockout threshold. resistor (RSL) connecting the SW pin to the current sense resistor (RSENSE) thus develops a ramping voltage drop. From the perspective of the SW pin, this ramping voltage adds to the voltage across the sense resistor, effectively reducing the current comparator threshold in proportion to duty cycle. The amount of reduction in the current comparator threshold ( ΔVSENSE) can be calculated using the following equation: ΔV Duty Cycle AR SENSE SLOPE = –% % • 6 80 20 μ Note the external programmable slope compensation is only needed when the internal slope compensation is not sufficient. In some applications RSL can be shorted. For the LTC3873-5, when the RDS(ON) sensing technique is used, the ringing on the SW pin disrupts the tiny slope compensation current out of the pin. It is not recommended to add external slope compensation in this case. Output Voltage Programming The output voltage is set by a resistor divider according to the following formula: VV R R O =+ ⎛ ⎝⎜ ⎞ ⎠⎟ 12 1 2 1 .• The external resistor divider is connected to the output as shown in Figure 4, allowing remote voltage sensing. Choose resistance values for R1 and R2 to be as large as possible in order to minimize any efficiency loss due to the static current drawn from VOUT, but just small enough so that when VOUT is in regulation, the error caused by the nonzero input current to the VFB pin is less than 1%. A good rule of thumb is to choose R1 to be 24k or less. Transformer Design Considerations Transformer specification and design is perhaps the most critical part of applying the LTC3873-5 successfully. In addition to the usual list of caveats dealing with high fre- quency power transformer design, the following should prove useful. APPLICATIONS INFORMATION Figure 5. External Pre-Regulator for VCC Bias Power Slope Compensation The LTC3873-5 has built-in internal slope compensation to stabilize the control loop against sub-harmonic oscilla- tion. It also provides the ability to externally increase slope compensation by injecting a ramping current out of its SW pin into an external slope compensation resistor (RSL in Figure 2). This current ramp starts at zero right after the NGATE pin has been high. The current rises linearly towards a peak of 20μA at the maximum duty cycle of 80%, shutting off once the NGATE pin goes low. A series LTC3873-5 VCC 38735 F05 Q1 RB VIN CVCC 0.1μF D1 8.2V GND |
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