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LTC3873ITS8-5-PBF Datasheet(PDF) 8 Page - Linear Technology |
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LTC3873ITS8-5-PBF Datasheet(HTML) 8 Page - Linear Technology |
8 / 16 page LTC3873-5 8 38735fb OPERATION VTURNON (nominally 4.1V) at least momentarily to enable LTC3873-5 operation. The VCCvoltageisthenallowedtofall to VTURNOFF (nominally 2.9V) before undervoltage lockout disables the LTC3873-5. The RUN/SS pin can be driven below VSHDN (nominally 0.7V) to force the LTC3873-5 into shutdown. When the chip is off, the input supply current is typically only 50μA. Keep in mind that VCC should exceed the gate threshold voltage of the switching MOSFET for safe operation. Soft-Start Leave the RUN/SS pin open to use the internal 3.3ms soft-start. During the internal soft-start, a voltage ramp limits the VITH. 3.3ms is required for ITH to ramp from zero current level to full current level. The soft-start can be lengthened by placing an external capacitor from the RUN/SS pin to the GND. A 3μA current will charge the capacitor, pulling the RUN/SS pin above the shutdown threshold and a 15μA pull-up current will continue to ramp RUN/SS to limit VITH during the start-up. When RUN/SS is driven by an external logic, a minimum of 2.75V logic is recommended to allow the maximum ITH range. Light Load Operation Under very light load current conditions, the ITH pin voltage will be very close to 0.85V. As the load current decreases further, an internal offset at the current comparator input will assure that the current comparator remains tripped (even at zero load current) and the regulator will start to skip cycles in order to maintain regulation. This behavior allows the regulator to maintain constant frequency down to very light loads, resulting in low output ripple as well as low audible noise and reduced RF interference while providing high light load efficiency. Current Sense During the switch on-time, the control circuit limits the maximum voltage drop across the current sense com- ponent to about 295mV, 110mV and 185mV at low duty cycle with IPRG tied to VIN, GND or left floating respec- tively. It is reduced with increasing duty cycle as shown in Figure 4. Figure 4. Maximum SENSE Threshold Voltage vs Duty Cycle DUTY CYCLE (%) 1 0 50 100 150 200 250 300 20 40 60 80 3873-5 F04 100 IPRG = HIGH IPRG = FLOAT IPRG = LOW |
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