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LTC3813IG Datasheet(PDF) 8 Page - Linear Technology |
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LTC3813IG Datasheet(HTML) 8 Page - Linear Technology |
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8 / 32 page  LTC3813 8 3813fb IOFF (Pin 1): Off-Time Current Input. Tie a resistor from VOUT to this pin to set the one-shot timer current and thereby set the switching frequency. VOFF (Pin 4): Off-Time Voltage Input. Voltage trip point for the on-time comparator. Tying this pin to an external resistive divider from the input makes the off-time pro- portional to VIN. The comparator defaults to 0.7V when the pin is grounded and defaults to 2.4V when the pin is connected to INTVCC. VRNG (Pin 5): Sense Voltage Limit Set. The voltage at this pin sets the nominal sense voltage at maximum output current and can be set from 0.5V to 2V by a resistive divider from INTVCC. The nominal sense voltage defaults to 95mV when this pin is tied to ground, and 215mV when tied to INTVCC. PGOOD (Pin 6): Power Good Output. Open-drain logic output that is pulled to ground when the output voltage is not between ±10% of the regulation point. The output voltage must be out of regulation for at least 125μs before the power good output is pulled to ground. SYNC (Pin 7): Sync Pin. This pin provides an external clock input to the phase detector. The phase-locked loop will force the rising top gate signal to be synchronized with the rising edge of the clock signal. ITH (Pin 8): Error Amplifier Compensation Point and Cur- rent Control Threshold. The current comparator threshold increases with control voltage. The voltage ranges from 0V to 2.6V with 1.2V corresponding to zero sense voltage (zero current). VFB(Pin9):FeedbackInput.ConnectVFBthrougharesistor divider network to VOUT to set the output voltage. PLL/LPF (Pin 10): The phase-locked loop’s lowpass filter is tied to this pin. The voltage at this pin defaults to 1.2V when the IC is not synchronized with an external clock at the SYNC pin. SS (Pin 11): Soft-Start Input. A capacitor to ground at this pin sets the ramp rate of the maximum current sense threshold. SGND (Pin 12): Signal Ground. All small signal components should connect to this ground and eventually connect to PGND at one point. SHDN (Pin 13): Shutdown Pin. Pulling this pin below 1.5V will shut down the LTC3813, turn off both of the external MOSFET switches and reduce the quiescent supply cur- rent to 240μA. UVIN (Pin 14): UVLO Input. This pin is input to the internal UVLO and is compared to an internal 0.8V reference. An external resistor divider is connected to this pin and the input supply to program the undervoltage lockout voltage. When UVIN is less than 0.8V, the LTC3813 is shut down. NDRV (Pin 15): Drive Output for External Pass Device of the Linear Regulator for INTVCC. Connect to the gate of an external NMOS pass device and a pull-up resistor to the input voltage VIN or the output voltage VOUT. EXTVCC (Pin 16): External Driver Supply Voltage. When this voltage exceeds 6.7V, an internal switch connects this pin to INTVCC through an LDO and turns off the exter- nal MOSFET connected to NDRV, so that controller and gate drive are drawn from EXTVCC. INTVCC (Pin 17): Main Supply Pin. All internal circuits except the output drivers are powered from this pin. INTVCC should be bypassed to ground (Pin 10) with at least a 0.1μF capacitor in close proximity to the LTC3813. DRVCC (Pin 18): Driver Supply Pin. DRVCC supplies power to the BG output driver. This pin is normally connected to INTVCC. DRVCC should be bypassed to BGRTN (Pin 20) with a low ESR (X5R or better) 1μF capacitor in close proximity to the LTC3813. PIN FUNCTIONS |
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