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LTC3805EDD-TR Datasheet(PDF) 9 Page - Linear Technology |
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LTC3805EDD-TR Datasheet(HTML) 9 Page - Linear Technology |
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9 / 20 page  LTC3805 9 3805fb Figure 1. Start-Up/Shutdown State Diagram LTC3805 SHUTDOWN LTC3805 FAULT TIMEOUT 3805 F01 VRUN > VRUNON AND VCC > VTURNON VRUN < VRUNOFF VCC < VTURNOFF VSSFLT < 0.7V VOC > 100mV LTC3805 ENABLED OPERATION Start-Up/Shutdown The LTC3805 has two shutdown mechanisms to disable and enable operation: an undervoltage lockout on the VCC supply pin voltage, and a precision-threshold RUN pin. The voltage on both pins must exceed the appropriate thresh- old before operation is enabled. The LTC3805 transitions into and out of shutdown according to the state diagram shown in Figure 1. Operation in fault timeout is discussed in a subsequent section. During shutdown the LTC3805 draws only a small 40μA current. The undervoltage lockout (UVLO) mechanism prevents the LTC3805 from trying to drive the external MOSFET gate with insufficient voltage on the VCC pin. The voltage at the VCC pin must initially exceed VTURNON = 8.4V to enable LTC3805 operation. After operation is enabled, the voltage on the VCC pin may fall as low as VTURNOFF = 4V before undervoltage lockout disables the LTC3805. This wide UVLO hysteresis range supports the use of trickle charger powering schemes. See the Applications Informa- tion section for more detail. The RUN pin is connected to the input voltage using a voltage divider. Converter operation is enabled when the voltage on the RUN pin exceeds VRUNON = 1.207V and disabled when the voltage falls below VRUNOFF = 1.170V. Additional hysteresis is added by a 5μA current source acting on the voltage divider’s Thevenin resistance. Setting the input voltage range and hysteresis is further discussed in the Applications Information section. Setting the Oscillator Frequency Connect a frequency set resistor RFS from the FS pin to ground to set the oscillator frequency over a range from 70kHz to 700kHz. The oscillator frequency is calculated from: fOSC = 24 • 109 RFS − 1500 The oscillator may be synchronized to an external clock using the SYNC input. The rising edge of the external clock on the SYNC pin triggers the beginning of a switching pe- riod, i.e., the GATE pin going high. The pulse width of the external clock is quite flexible. The clock must stay high only for about 200ns to trigger the start of a new switching period. Conversely, the pulse width can be increased to a duty cycle not greater than 55%. Overcurrent Protection With the OC pin connected to the external MOSFET’s current sense resistor, the converter is protected in the event of an overload or short-circuit on the output. During normal operation the peak value of current in the external MOSFET, as measured by the current sense resistor (plus any adjust- ment for slope compensation), is set by the voltage on the ITH pin operating through the current comparator. As the output current increases, so does the voltage on the ITH pin and so does the peak MOSFET current. |
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