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FAN4802LMY Datasheet(PDF) 7 Page - Fairchild Semiconductor |
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FAN4802LMY Datasheet(HTML) 7 Page - Fairchild Semiconductor |
7 / 24 page © 2008 Fairchild Semiconductor Corporation www.fairchildsemi.com FAN4800A/C, FAN4801/1S/2/2L • Rev. 1.0.1 7 Pin Configuration Figure 6. Pin Configuration (Top View ) Pin Definitions Pin # Name Description 1 IEA Output of PFC Current Amplifier. The signal from this pin is compared with an internal sawtooth to determine the pulse width for PFC gate drive. 2 IAC Input AC Current. For normal operation, this input provides current reference for the multiplier. The suggested maximum IAC is 100µA. 3 ISENSE PFC Current Sense. The non-inverting input of the PFC current amplifier and the output of multiplier and PFC ILIMIT comparator. 4 VRMS Line-Voltage Detection. Line voltage detection. The pin is used for PFC multiplier. 5 SS PWM Soft-Start. During startup, the SS pin charges an external capacitor with a 10µA constant current source. The voltage on FBPWM is clamped by SS during startup. In the event of a protection condition occurring and/or PWM disabled, the SS pin is quickly discharged. 6 FBPWM PWM Feedback Input. The control input for voltage-loop feedback of PWM stage. 7 RT/CT Oscillator RC Timing Connection. Oscillator timing node; timing set by RT and CT. 8 RAMP PWM RAMP Input. In current mode, this pin functions as the current sense input; when in voltage mode, it is the feed forward sense input from PFC output 380V (feedforward ramp). 9 ILIMIT Peak Current Limit Setting for PWM. The peak current limits setting for PWM. 10 GND Ground. 11 OPWM PWM Gate Drive. The totem-pole output drive for PWM MOSFET. This pin is internally clamped under 15V to protect the MOSFET. 12 OPFC PFC Gate Drive. The totem pole output drive for PWM MOSFET. This pin is internally clamped under 15V to protect the MOSFET. 13 VDD Supply. The power supply pin. The threshold voltages for startup and turn-off are 11V and 9.3V, respectively. The operating current is lower than 10mA. 14 VREF Reference Voltage. Buffered output for the internal 7.5V reference. 15 FBPFC Voltage Feedback Input for PFC. The feedback input for PFC voltage loop. The inverting input of PFC error amplifier. This pin is connected to the PFC output through a divider network. 16 VEA Output of PFC Voltage Amplifier. The error amplifier output for PFC voltage feedback loop. A compensation network is connected between this pin and ground. |
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