LTC2951-1/LTC2951-2

3

295112fa

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

Push Button Pin (⎯P⎯B)

⎯P⎯B Voltage Range

Single-Ended

●

–1

26.4

V

⎯P⎯B Input Current

●

●

●

–1

–3

–6

–9

±1

–12

–15

µA

µA

µA

⎯P⎯B Input Threshold

⎯P⎯B Falling

●

0.6

0.8

1

V

⎯P⎯B Open Circuit Voltage

●

11.62

V

Timing Pins (KILLT, OFFT)

KILLT/OFFT Pull Up Current

●

–2.4

–3

–3.6

µA

KILLT/OFFT Pull Down Current

●

2.4

3

3.6

µA

Turn On Debounce Time

⎯P⎯B Falling → Enable Asserted

●

100

128

163

ms

Internal Turn Off Debounce Time

OFFT Pin Float, ⎯P⎯B Falling → ⎯I⎯N⎯T Falling

●

26

32

41

ms

●

9

11.5

13.5

ms

µP Handshake Pins (⎯I⎯N⎯T, ⎯K⎯I⎯L⎯L)

⎯I⎯N⎯T Leakage Current

●

±1

µA

⎯I⎯N⎯T Output Voltage Low

●

0.11

0.4

V

⎯K⎯I⎯L⎯L Input Threshold Voltage

⎯K⎯I⎯L⎯L Falling

●

0.57

0.6

0.63

V

⎯K⎯I⎯L⎯L Input Threshold Hysteresis

●

10

30

50

mV

⎯K⎯I⎯L⎯L Leakage Current

●

±0.1

µA

⎯K⎯I⎯L⎯L Minimum Pulse Width

●

30

µs

⎯K⎯I⎯L⎯L Propagation Delay

⎯K⎯I⎯L⎯L Falling → Enable Released

●

30

µs

⎯K⎯I⎯L⎯L Turn On Blanking (Note 3)

⎯K⎯I⎯L⎯L = Low, Enable Asserted → Enable

Released

●

400

512

650

ms

Internal ⎯K⎯I⎯L⎯L Turn Off Delay

(Note 4)

KILLT Pin Float, ⎯K⎯I⎯L⎯L = High, ⎯⎯I⎯⎯⎯N⎯⎯⎯T Asserted →

Enable Released

●

100

128

163

ms

ADDITIONAL

Additional Adjustable ⎯K⎯I⎯L⎯L Turn Off

Delay (Note 4)

●

9

11.5

13.5

ms

EN/⎯E⎯N Lock Out Time (Note 5)

Enable Released → Enable Asserted

●

200

256

325

ms

EN/⎯E⎯N Leakage Current

●

±0.1

µA

EN/⎯E⎯N Voltage Output Low

●

0.11

0.4

V

Note 1: Stresses beyond those listed under Absolute Maximum Ratings

may cause permanent damage to the device. Exposure to any Absolute

Maximum Rating condition for extended periods may affect device

reliability and lifetime.

Note 2: All currents into pins are positive; all voltages are referenced to

GND unless otherwise noted.

Note 3: The ⎯K⎯I⎯L⎯L turn on blanking timer period is the waiting period

immediately after the enable output is asserted. This blanking time allows

sufficient time for the DC/DC converter and the µP to perform power up

tasks. The ⎯K⎯I⎯L⎯L and ⎯P⎯B inputs are ignored during this period. If ⎯K⎯I⎯L⎯L

remains low at the end of this time period, the enable output is released,

delay from the initiation of a power off sequence (⎯I⎯N⎯T falling, ⎯K⎯I⎯L⎯L = high),

to the release of the enable output. The additional, adjustable ⎯K⎯I⎯L⎯L turn

output. If the ⎯K⎯I⎯L⎯L input switches low at any time during ⎯K⎯I⎯L⎯L turn off

delay, enable is released, thus turning off system power.

Note 5: The enable lock out time is designed to allow an application to

properly power down such that the next power up sequence starts from a

consistent powered down configuration. ⎯P⎯B is ignored during this lock out

ELECTRICAL CHARACTERISTICS