AIC1384

DDR Termination Regulator

Analog Integrations Corporation

Si-Soft Research Center

DS-1384G-01 073108

3A1, No.1, Li-Hsin Rd. I , Science Park , Hsinchu 300, Taiwan , R.O.C.

TEL: 886-3-5772500

FAX: 886-3-5772510

www.analog.com.tw

1

FEATURES

Source and Sink Current Capability

Suspend To RAM Functionality

Requirements

Low Output Voltage Offset,

±20mV

High Accuracy Output Voltage at Full-Load

Low External Component Count

No external resistor required

Current Limit protection

Thermal Protection

SOP-8 and SOP-8 Exposed Pad (Heat Sink)

Package

APPLICATIONS

Mother board

Graphic cards

DDRⅠ and DDRⅡ termination voltage

DESCRIPTION

The AIC1384 linear regulator is designed to

deliver 1.5A continuous current and up to 3A

peak transient currents for termination of DDR-

SRAM. The AIC1384 contains a high-speed

operational amplifier to supply superior load

output as a reference for the chipset and

areas.

The AIC1384 also features an active low

shutdown pin that provides Suspend To RAM

keep active. The advantage of power saving

can be obtained through low 150

µA (DDRⅠ)

quiescent current.

Built in current limiting in source and sink mode,

with

thermal

shutdown

provide

maximal

protection

to

the

AIC1384

against

fault

conditions.

TYPICAL APPLICATION CIRCUIT

GND

1

SD

2

VSENSE

3

VREF

4

VDDQ

5

AVIN

6

PVIN

7

VTT

8

AIC1384

10nF

VREF=1.25V

SD

VIN=2.5V

VTT=1.25V

VDDQ=2.5V

47uF

Cin

22uF

Cout