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AK4614 Datasheet(PDF) 11 Page - Asahi Kasei Microsystems |
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AK4614 Datasheet(HTML) 11 Page - Asahi Kasei Microsystems |
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11 / 69 page  [AK4614] MS1025-E-00 2008/10 - 11 - DAC Analog Output Characteristics (differential outputs) 0dBFS 90 100 dB fs=48kHz BW=20kHz -60dBFS 45 0dBFS 88 98 fs=96kHz BW=40kHz -60dBFS 42 0dBFS 98 S/(N+D) fs=192kHz BW=40kHz -60dBFS 42 DR (-60dBFS with A-weighted) 100 108 dB S/N (A-weighted) 100 108 dB Interchannel Isolation 90 110 dB Interchannel Gain Mismatch 0 0.5 dB Gain Drift 20 - ppm/ °C Output Voltage AOUT=0.65xVREFH2 (Note 8) ±1.87 ±2.08 ±2.29 Vpp Load Resistance (Note 10) 2 k Ω Load Capacitance 30 pF Power Supply Rejection (Note 7) 50 dB Note 7. PSR is applied to AVDD1, AVDD2, DVDD, TVDD1 and TVDD2 with 1kHz, 50mVpp. VREFH1 and VREFH2 pins are held a constant voltage +3.3V. Note 8. This value is (LIN+) – (LIN-) and (RIN+) – (RIN-). The voltage is proportional to VREFH1, VREFH2 voltage. Note 9. VREFH1 and VREFH2 are held +3.3V, the input bias voltage is set to AVDD1, 2 x 0.5. The 1kHz, 0.96Vpp signal is applied to LIN- and LIN+ with same phase (e.g. shorted) or RIN- and RIN+. The CMRR is measured as the attenuation level from 0dB = -7dBFS (since the normal 0.96Vpp = -7dBFS). This value is guaranteed but not tested. Note 10. For AC-load. In the case of DC-load is 5kΩ. Note 11. This value is Load Capacitance for output pin to GND. In differential mode, this value should be estimated to be twice, because Load Capacitance exists to GND and between the differential pin. Parameter min typ max Units Power Supplies Power Supply Current Normal Operation (PDN pin = “H”) AVDD1+AVDD2 fs=48kHz, 96kHz, 192kHz DVDD fs=48kHz fs=96kHz fs=192kHz TVDD1+TVDD2 fs=48kHz fs=96kHz fs=192kHz Power-down mode (PDN pin = “L”, DVMPD = “ L”) (Note 12) AVDD1+AVDD2+DVDD+TVDD1+TVDD2 (PDN pin = “L”, DVMPD = “ H”) (Note 12) AVDD1+AVDD2+DVDD+TVDD1+TVDD2 95.0 18.0 25.0 40.0 6.0 7.0 7.0 300 10 125.0 24.0 35.0 55.0 8.0 9.5 9.5 550 200 mA mA mA mA mA mA mA µA µA Note 12. In the power-down mode, all digital input pins including clock pins are held VSS3 (TST1, TST3, TST4, TST5, CAD0, CAD1, I2C, CSN, CCLK, CDTI pins), VSS4 (TST2, M/S, MCKI, LRCK, BICK, SDTI1, SDTI2, SDTI3, SDTI4,SDTI5, SDTI6). |
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