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PRELIMINARY DATA SHEET - Rev 1.0

02/2009

AIT1042

Synthesizer Programming Example

ThefollowingisanexampleforprogrammingthetwosynthesizersintheAIT1042device.Thecalculations

willdeterminethevaluesrequiredtoinputintothefourmainregisters:

•Maindividerandreferencedividerfortheupconverter

•Maindividerandreferencedividerforthedownconverter.

Conditions

ThedesiredCATVfrequencytoreceiveis55.25MHz(picturecarrier).

The1stIF(HIF)is1690.75MHzandthe2ndIFis45.75MHz.

Phasedetectorcomparisonfrequencyfortheupconverteris2000KHz(2MHz).

Phasedetectorcomparisonfrequencyforthedownconverteris62.5KHz.

Thecrystal(xtal)referenceoscillatorfrequencyis16MHz

Thepresetmodulusoftheprescalarfor:Upconverter-P=16andforDownconveter–P=64.

Calculation of the Reference Divider Values

Thevalueforeachreferencedividercanbecalculatedbydividingthereferenceoscillatorfrequencybythe

desiredphasedetectorcomparisonfrequency:

R=Fref.osc./FPD

Fortheupconverter,the16MHzcrystaloscillatorfrequencyandthe2000KHzphasedetectorcomparison

frequencyareusedtoget:

RPLL1=16MHz/2000KHz(2MHz)=8.Therefore,thebitvaluesfortheupconverterreferencedividerregis-

terwouldbe:0000001000

Forthedownconverter,the16MHzcrystaloscillatorfrequencyandthe62.5KHzphasedetectorcomparison

frequencyareusedtoget:RPLL2=16MHz/62.5KHz(0.625MHz)=256.Therefore,thebitvaluesforthe

downconverterreferencedividerregisterwouldbe:

0100000000

Main Divider Register Calculations

ThevaluesoftheAandBcountersaredeterminedbythedesiredVCOoutputfrequencyoftheon-chiplocal

oscillatorsandthephasedetectorcomparisonfrequency:

N=FVCO/FPDB=trunc(N/P)A=N–(BxP)

Theupconverterlocaloscillatorfrequencywillbe1690.75MHz+55.25MHz=1746MHzforthisexample.

Therefore,theNvalueforPLL1willbe=1746MHz/2MHz=873,theBvalueforPLL1willbe=(873/16)=

54,andtheAvalueforPLL1willbe=873–(54x16)=9.Theupconvertermaindividerregistervaluewill

be:B=00000110110,A=0001001

Thedownconverterlocaloscillatorfrequencywillbe1690.75–45.75MHz=1645MHz.

Therefore,theNvaluesforPLL2willbe1645MHz/62.5KHz=26320,theBvalueforPLL2willbe=

(26320/64)=411,andtheAvalueforPLL2willbe=26320–(411x64)=16.Thedownconvertermain

registervaluewillbe:B=00110011011,A=0010000