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LTC2290UP Datasheet(PDF) 1 Page - Linear Technology |
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LTC2290UP Datasheet(HTML) 1 Page - Linear Technology |
1 / 24 page LTC2290 1 2290fa , LTC and LT are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. FEATURES DESCRIPTIO APPLICATIO S TYPICAL APPLICATIO ■ Integrated Dual 12-Bit ADCs ■ Sample Rate: 10Msps ■ Single 3V Supply (2.7V to 3.4V) ■ Low Power: 120mW ■ 71.3dB SNR ■ 90dB SFDR ■ 110dB Channel Isolation ■ Multiplexed or Separate Data Bus ■ Flexible Input: 1VP-P to 2VP-P Range ■ 575MHz Full Power Bandwidth S/H ■ Clock Duty Cycle Stabilizer ■ Shutdown and Nap Modes ■ Pin Compatible Family 105Msps: LTC2282 (12-Bit), LTC2284 (14-Bit) 80Msps: LTC2294 (12-Bit), LTC2299 (14-Bit) 65Msps: LTC2293 (12-Bit), LTC2298 (14-Bit) 40Msps: LTC2292 (12-Bit), LTC2297 (14-Bit) 25Msps: LTC2291 (12-Bit), LTC2296 (14-Bit) 10Msps: LTC2290 (12-Bit), LTC2295 (14-Bit) ■ 64-Pin (9mm × 9mm) QFN Package Dual 12-Bit, 10Msps Low Power 3V ADC The LTC ®2290 is a 12-bit 10Msps, low power dual 3V A/D converter designed for digitizing high frequency, wide dynamic range signals. The LTC2290 is perfect for demanding imaging and communications applications with AC performance that includes 71.3dB SNR and 90dB SFDR for signals well beyond the Nyquist frequency. DC specs include ±0.3LSB INL (typ), ±0.15LSB DNL (typ) and no missing codes over temperature. The transition noise is a low 0.25LSBRMS. A single 3V supply allows low power operation. A separate output supply allows the outputs to drive 0.5V to 3.6V logic. An optional multiplexer allows both channels to share a digital output bus. A single-ended CLK input controls converter operation. An optional clock duty cycle stabilizer allows high perfor- mance at full speed for a wide range of clock duty cycles. Typical INL, 2V Range ■ Wireless and Wired Broadband Communication ■ Imaging Systems ■ Spectral Analysis ■ Portable Instrumentation CODE 0 –1.0 –0.8 –0.4 –0.2 0 1.0 0.4 1024 2048 2290 TA01 –0.6 0.6 0.8 0.2 3072 4096 – + INPUT S/H ANALOG INPUT A ANALOG INPUT B CLK A CLK B 12-BIT PIPELINED ADC CORE CLOCK/DUTY CYCLE CONTROL OUTPUT DRIVERS • • • OVDD OGND MUX D11A D0A • • • OVDD OGND 2295 TA01 D11B D0B – + OUTPUT DRIVERS INPUT S/H 12-BIT PIPELINED ADC CORE CLOCK/DUTY CYCLE CONTROL |
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