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LTC2281 Datasheet(PDF) 1 Page - Linear Technology |
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LTC2281 Datasheet(HTML) 1 Page - Linear Technology |
1 / 24 page LTC2281 1 2281fb TYPICAL APPLICATION FEATURES APPLICATIONS DESCRIPTION Dual 10-Bit, 125Msps Low Power 3V ADC The LTC®2281 is a 10-bit 125Msps, low power dual 3V A/D converter designed for digitizing high frequency, wide dynamic range signals. The LTC2281 is perfect for demanding imaging and communications applications with AC performance that includes 61.6dB SNR and 82dB SFDR for signals at the Nyquist frequency. Typical DC specs include ±0.1LSB INL, ±0.1LSB DNL. The transition noise is a low 0.08LSBRMS. A single 3V supply allows low power operation. A separate output supply allows the outputs to drive 0.5V to 3.6V logic. A single-ended CLK input controls converter operation. An optional clock duty cycle stabilizer allows high perfor- mance at full speed for a wide range of clock duty cycles. A data ready output clock (CLKOUT) can be used to latch the output data. SNR vs Input Frequency, –1dB, 2V Range n Integrated Dual 10-Bit ADCs n Sample Rate: 125Msps n Single 3V Supply (2.85V to 3.4V) n Low Power: 790mW n 61.6dB SNR, 88dB SFDR n 110dB Channel Isolation at 100MHz n Flexible Input: 1VP-P to 2VP-P Range n 640MHz Full Power Bandwidth S/H n Clock Duty Cycle Stabilizer n Shutdown and Nap Modes n Data Ready Output Clock n Pin Compatible Family 125Msps: LTC2283 (12-Bit), LTC2281 (10-Bit) 105Msps: LTC2282 (12-Bit), LTC2280 (10-Bit) 80Msps: LTC2294 (12-Bit), LTC2289 (10-Bit) 65Msps: LTC2293 (12-Bit), LTC2288 (10-Bit) 40Msps: LTC2292 (12-Bit), LTC2287 (10-Bit) n 64-Pin (9mm × 9mm) QFN Package n Wireless and Wired Broadband Communication n Imaging Systems n Spectral Analysis n Portable Instrumentation L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. – + INPUT S/H ANALOG INPUT A ANALOG INPUT B CLK A CLK B 10-BIT PIPELINED ADC CORE CLOCK/DUTY CYCLE CONTROL OUTPUT DRIVERS • • • OVDD OGND MUX CLKOUT D9A D0A • • • OVDD OGND 2281 TA01 D9B D0B – + OUTPUT DRIVERS INPUT S/H 10-BIT PIPELINED ADC CORE CLOCK/DUTY CYCLE CONTROL OF INPUT FREQUENCY (MHz) 0 55 56 58 59 60 65 62 100 200 250 2281 TA01b 57 63 64 61 50 150 300 350 |
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