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LTC2240CUP-12 Datasheet(PDF) 6 Page - Linear Technology |
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LTC2240CUP-12 Datasheet(HTML) 6 Page - Linear Technology |
6 / 28 page LTC2240-12 6 224012fb TIMING CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 4) ELECTRICAL CHARACTERISTICS SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS DATA to CLKOUT Skew (tC – tD) (Note 7) l –0.6 0 0.6 ns Pipeline Latency Full Rate CMOS 5 Cycles Demuxed Interleaved 5 Cycles Demuxed Simultaneous 5 and 6 Cycles Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: All voltage values are with respect to ground with GND and OGND wired together (unless otherwise noted). Note 3: When these pin voltages are taken below GND or above VDD, they will be clamped by internal diodes. This product can handle input currents of greater than 100mA below GND or above VDD without latchup. Note 4: VDD = 2.5V, fSAMPLE = 170MHz, LVDS outputs, differential ENC+/ENC– = 2VP-P sine wave, input range = 2VP-P with differential drive, unless otherwise noted. Note 5: Integral nonlinearity is defined as the deviation of a code from a “best straight line” fit to the transfer curve. The deviation is measured from the center of the quantization band. Note 6: Offset error is the offset voltage measured from –0.5 LSB when the output code flickers between 0000 0000 0000 and 1111 1111 1111 in 2’s complement output mode. Note 7: Guaranteed by design, not subject to test. Note 8: Recommended operating conditions. Note 9: VDD = 2.5V, fSAMPLE = 170MHz, differential ENC+/ENC– = 2VP-P sine wave, input range = 1VP-P with differential drive, output CLOAD = 5pF. Note 10: SNR minimum and typical values are for LVDS mode. Typical values for CMOS mode are typically 0.3dB lower. Note 11: SFDR minimum values are for LVDS mode. Typical values are for both LVDS and CMOS modes. Note 12: SINAD minimum and typical values are for LVDS mode. Typical values for CMOS mode are typically 0.3dB lower. TYPICAL PERFORMANCE CHARACTERISTICS Integral Nonlinearity Differential Nonlinearity 8192 Point FFT, fIN = 5MHz, –1dB, 2V Range, LVDS Mode (TA = 25°C unless otherwise noted, Note 4) OUTPUT CODE 0 –1.0 –0.8 –0.4 –0.2 0 1.0 0.4 1024 2048 224012 G01 –0.6 0.6 0.8 0.2 3072 4096 OUTPUT CODE 0 –1.0 –0.8 –0.4 –0.2 0 1.0 0.4 1024 2048 224012 G02 –0.6 0.6 0.8 0.2 3072 4096 FREQUENCY (MHz) 0 –80 –20 –10 0 20 40 60 10 30 50 70 224012 G03 –100 –40 –60 –90 –30 –110 –50 –70 80 |
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