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LT1871IMS-7-PBF Datasheet(PDF) 7 Page - Linear Technology |
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LT1871IMS-7-PBF Datasheet(HTML) 7 Page - Linear Technology |
7 / 32 page LTC1871-7 7 18717fc PIN FUNCTIONS MODE/SYNC (Pin 5): This input controls the operating mode of the converter and allows for synchronizing the operating frequency to an external clock. If the MODE/ SYNC pin is connected to ground, Burst Mode operation is enabled. If the MODE/SYNC pin is connected to INTVCC, or if an external logic-level synchronization signal is ap- plied to this input, Burst Mode operation is disabled and the IC operates in a continuous mode. GND (Pin 6): Ground Pin. GATE (Pin 7): Gate Driver Output. INTVCC (Pin 8): The Internal 7V Regulator Output. The gate driver and control circuits are powered from this voltage. Decouple this pin locally to the IC ground with a minimum of 4.7μF low ESR tantalum or ceramic ca- pacitor. This 7V regulator has an undervoltage lockout circuit with 5.6V and 4.6V rising and falling thresholds, respectively. VIN (Pin 9): Main Supply Pin. Must be closely decoupled to ground. SENSE (Pin 10): The Current Sense Input for the Control Loop. Connect this pin to a resistor in the source of the power MOSFET. Alternatively, the SENSE pin may be con- nected to the drain of the power MOSFET, in applications where the maximum VDS is less than 36V. Internal leading edge blanking is provided for both sensing methods. BLOCK DIAGRAM + 1.230V 85mV OV 50k EA UV TO START-UP CONTROL BURST COMPARATOR S R Q LOGIC PWM LATCH CURRENT COMPARATOR 0.30V 1.230V 7V 5.6V UP 4.6V DOWN 1.230V SLOPE 1.230V ILOOP FB ITH gm 3 MODE/SYNC 5 FREQ 4 2 INTVCC 8 LDO V-TO-I OSC V-TO-I SLOPE COMPENSATION BIAS AND START-UP CONTROL VIN BIAS VREF IOSC RLOOP – + – + C1 SENSE 10 GND 18717 BD 6 GATE INTVCC GND 7 VIN 1.248V 9 RUN C2 1 0.6V |
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