Part Name
         Description
AON6450L

 N-Channel SDMOS TM Power Transistor ( 7 Page)


AOSMD
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AON6450L
Symbol
Min
Typ
Max
Units
BVDSS
100
V
VDS=100V, VGS=0V
10
TJ=55°C
50
IGSS
100
nA
VGS(th)
Gate Threshold Voltage
2.8
3.4
4
V
ID(ON)
110
A
12.1
14.5
TJ=125°C
22.8
27.5
14
17.5
m
gFS
52
S
VSD
0.7
1
V
IS
52
A
Ciss
2000
2570
3100
pF
Coss
170
250
330
pF
Crss
50
80
120
pF
Rg
0.4
0.8
1.2
Qg(10V)
34
43
52
nC
Qg(4.5V)
9
11.5
14
nC
Qgs
11
14
17
nC
Qgd
8
13.5
19
nC
tD(on)
15
ns
tr
5ns
tD(off)
28.5
ns
tf
5ns
trr
17
24
31
ns
Qrr
75
108
140
nC
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING
OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,
FUNCTIONS AND RELIABILITY WITHOUT NOTICE.
Body Diode Reverse Recovery Time
Drain-Source Breakdown Voltage
On state drain current
ID=250µA, VGS=0V
VGS=10V, VDS=5V
VGS=10V, ID=20A
Reverse Transfer Capacitance
IF=20A, dI/dt=500A/µs
VGS=0V, VDS=50V, f=1MHz
SWITCHING PARAMETERS
Electrical Characteristics (TJ=25°C unless otherwise noted)
STATIC PARAMETERS
Parameter
Conditions
IDSS
µA
VDS=VGS ID=250µA
VDS=0V, VGS= ±25V
Zero Gate Voltage Drain Current
Gate-Body leakage current
Forward Transconductance
Diode Forward Voltage
RDS(ON)
Static Drain-Source On-Resistance
m
IS=1A,VGS=0V
VDS=5V, ID=20A
VGS=7V, ID=20A
VGS=10V, VDS=50V, RL=2.5Ω,
RGEN=3Ω
Gate resistance
VGS=0V, VDS=0V, f=1MHz
Turn-Off Fall Time
Total Gate Charge
VGS=10V, VDS=50V, ID=20A
Gate Source Charge
Gate Drain Charge
Total Gate Charge
Rev 0: January 2009
Body Diode Reverse Recovery Charge IF=20A, dI/dt=500A/µs
Maximum Body-Diode Continuous Current
Input Capacitance
Output Capacitance
Turn-On DelayTime
DYNAMIC PARAMETERS
Turn-On Rise Time
Turn-Off DelayTime
A. The value of RθJA is measured with the device mounted on 1in
2 FR-4 board with 2oz. Copper, in a still air environment with T
A =25°C. The
Power dissipation PDSM is based on R θJA and the maximum allowed junction temperature of 150°C. The value in any given application depends on
the user's specific board design, and the maximum temperature of 150°C may be used if the PCB allows it.
B. The power dissipation PD is based on TJ(MAX)=150°C, using junction-to-case thermal resistance, and is more useful in setting the upper
dissipation limit for cases where additional heatsinking is used.
C. Repetitive rating, pulse width limited by junction temperature TJ(MAX)=150°C. Ratings are based on low frequency and duty cycles to keep initial
TJ =25°C.
D. The RθJA is the sum of the thermal impedence from junction to case RθJC and case to ambient.
E. The static characteristics in Figures 1 to 6 are obtained using <300
µs pulses, duty cycle 0.5% max.
F. These curves are based on the junction-to-case thermal impedence which is measured with the device mounted to a large heatsink, assuming
a maximum junction temperature of TJ(MAX)=150°C. The SOA curve provides a single pulse rating.
G. These tests are performed with the device mounted on 1 in
2 FR-4 board with 2oz. Copper, in a still air environment with T
A=25°C.
Rev 0: January 2009
www.aosmd.com
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