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LTC6652AHMS8-4.096-TRPBF Datasheet(PDF) 11 Page - Linear Technology |
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LTC6652AHMS8-4.096-TRPBF Datasheet(HTML) 11 Page - Linear Technology |
11 / 16 page LTC6652 11 6652fb APPLICATIONS INFORMATION Figure 8. Start-Up Response Without Output Capacitor Figure 9. Start-Up Response with 1μF Output Capacitor Figure 10. Open-Drain Shutdown Circuit Figure 11. Shutdown Response with 5mA Load In Figure 8, ripple momentarily appears just after the leading edge of powering on. This brief one time event is caused by calibration circuitry during initialization. When an output capacitor is used, the ripple is virtually undetectable as shown in Figure 9. Shutdown Mode Shutdown mode is enabled by tying SHDN low which places the part in a low power state (i.e., <2μA). In shutdown mode, the output pin takes the value 20k • (rated output voltage). For example, an LTC6652-2.5 will have an output impedance of 20k • 2.5 = 50kΩ. For normal operation, SHDN should be greater than or equal to 2.0V. For use with a microcontroller, use a pull-up resistor to VIN and an open-drain output driver as shown in Figure 10. The LTC6652’s response into and out of shutdown mode is shown in Figure 11. The trip thresholds on SHDN have some dependence on the voltage applied to VIN as shown in the Typical Performance Characteristics section. Be careful to avoid leaving SHDN at a voltage between the thresholds as this will likely cause an increase in supply current due to shoot-through current. Long-Term Drift Long-term drift cannot be extrapolated from acceler- ated high temperature testing. This erroneous technique gives drift numbers that are wildly optimistic. The only way long-term drift can be determined is to measure it over the time interval of interest. The LTC6652 long-term drift data was collected on more than 100 parts that were soldered into PC boards similar to a “real world” application. The boards were then placed into a constant temperature oven with TA = 35°C, their outputs were scanned regularly and measured with an 8.5 digit DVM. Long-term drift is shown below in Figure 12. VIN 2V/DIV VOUT 1V/DIV 100μs/DIV 6652 F08 COUT = 0μF 2.8V VIN 13.2V VOUT TO μC C1 1μF C2 1μF R1 20k 6652 F10 LTC6652-2.5 SHDN 2N7002 VOUT VIN GND VIN 2V/DIV VOUT 1V/DIV 100μs/DIV 6652 F09 COUT = 1μF SHDN 1V/DIV VOUT 1V/DIV 1ms/DIV 6652 F11 ILOAD = 5mA |
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