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LTC4311CDC-TRMPBF Datasheet(PDF) 10 Page - Linear Technology |
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LTC4311CDC-TRMPBF Datasheet(HTML) 10 Page - Linear Technology |
10 / 12 page LTC4311 10 4311fa APPLICATIONS INFORMATION t 2 = –13kΩ• 400pF • In 2.1V + 0.15V – 3.3V – 13kΩ•2.5mA 0.9V – 3.3V – 13k Ω•2.5mA ⎧ ⎨ ⎩ ⎫ ⎬ ⎭ = 0.205µs (20) t r = t1 + t2 = 0.515µs + 0.205µs = 0.72µs (21) t f = 293Ω• 400pF • In 2.1V + 0.15V 3.3V • (13k Ω+ 300Ω)– 300Ω 0.8V – 0.15V 3.3V • (13k Ω+ 300Ω)– 300Ω ⎧ ⎨ ⎪ ⎩ ⎪ ⎫ ⎬ ⎪ ⎭ ⎪ = 0.156µs (22) The rise time meets the 1μs SMBus requirement and the fall time meets the 0.3μs requirement. The VOL is satisfied while meeting the minimum slew rate requirements, so RP is chosen to be 13kΩ. If the rise time was not met due to a large t1, equation 6 can be used to calculate a maximum value of RP that will meet the rise time requirements. ACK Data Setup Time Care must be taken in selecting the value of RS (in series with the pull-down driver) to ensure that the data setup time requirement for ACK (acknowledge) is fulfilled. An acknowledge is the host releasing the SDA line (pulling high) at the end of the last bit sent and the slave device pulling the SDA line low before the rising edge of the ACK clock pulse. The LTC4311 5mA pull-up current is activated when the host releases the SDA line, allowing the voltage to rise above the LTC4311’s comparator threshold (VTHR). If a slave device has a high value of RS, a longer time is required for the slave device to pull SDA low before the rising edge of the ACK clock pulse. To ensure sufficient data setup time for ACK, slave devices with high values of RS should pull the SDA low earlier. An alternative is the slave device can hold the SCL line low until the SDA line reaches a stable state. Then, SCL can be released to generate the ACK clock pulse. Multiple LTC4311s in Parallel In very heavily loaded systems, stronger pull up current may be desired. Two LTC4311’s may be used in parallel to increase the total pull up current to meet rise time requirements. Notes on Using the LTC4311 in LTC1694 Applications Although the LTC1694 and LTC4311 are functionally similar accelerators for I2C, SMBus, and other comparable open drain/collector bus applications, the LTC4311 offers a lower power, higher performance solution in a smaller package as compared to the LTC1694. These and other differences are listed in Table 1 and must be accounted for if using the LTC4311 in LTC1694 applications. Table 1. Differences Between LTC1694 and LTC4311 SPECIFICATION LTC1694 LTC4311 COMMENTS Enable Pin (typ) N/A 1V Allows the LTC4311 to be Disabled, Consuming Less than 5μA VCC 2.7V – 6V 1.6V – 5.5V Lower Operating Supply Voltage for Low Voltage Systems ICC (typ), BUS1, BUS2 High 60μA 26μA Lower Standby Current to Conserve Power VTHRES (typ) 0.65V Dependent on VCC Tighter, Higher Noise Margins and Improved Rise Times IPULL-UP (typ) 2.2mA 5mA Stronger Slew-Limited Source Current for Slewing Higher Bus Capacitances fMAX 100kHz 400kHz Higher Operating Frequency for I2C’s Fast Mode Bus Specification |
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