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19 page 
LTC4268-1 19 42681fa UNDERVOLTAGE LOCKOUT The IEEE 802.3af specification dictates a maximum turn-on voltage of 42V and a minimum turn-off voltage of 30V for the PD. In addition, the PD must maintain large on-off hysteresis to prevent current-resistance (I-R) drops in the wiring between the PSE and the PD from causing start-up oscillation. The LTC4268-1 incorporates an undervoltage lockout (UVLO) circuit that monitors line voltage at VPORTN to determine when to apply power to the PD load (Figure 7). Before power is applied to the load, the VNEG pin is high impedance and there is no charge on capacitor C1. When the input voltage rises above the UVLO turn-on threshold, the LTC4268-1 removes the classification load current and turns on the internal power MOSFET. C1 charges up under LTC4268-1 inrush current limit control and the VNEG pin transitions from 0V to VPORTN as shown in Figure 3. The LTC4268-1 includes a hysteretic UVLO circuit on VPORTN that keeps power applied to the load until the magnitude of the input voltage falls below the UVLO turn-off threshold. Once VPORTN falls below UVLO turn-off, the internal power MOSFET disconnects VNEG from VPORTN and the classification current is re-enabled. C1 will discharge through the PD circuitry and the VNEG pin will go to a high impedance state. INPUT CURRENT LIMIT IEEE 802.3af specifies a maximum inrush current and also specifies a minimum load capacitor between the VPORTP and VNEG pins. To control turn-on surge currents in the system the LTC4268-1 integrates a dual current limit circuit using an onboard power MOSFET and sense resistor to provide a complete inrush control circuit without additional external components. At turn-on, the LTC4268-1 will limit the inrush current to ILIMIT_LOW, allowing the load capaci- tor to ramp up to the line voltage in a controlled manner without interference from the PSE current limit. By keeping the PD current limit below the PSE current limit, PD power up characteristics are well controlled and independent of PSE behavior. This ensures interoperability regardless of PSE output characteristics. After load capacitor C1 is charged up, the LTC4268-1 switches to the high input current limit, ILIMIT_HIGH. This allows the LTC4268-1 to deliver up to 35W to the PD load for high power applications. To maintain compatibility with IEEE 802.3af power levels, it is necessary for the PD designer to ensure the PD steady-state power consumption remains below the limits shown in Table 2. The LTC4268-1 maintains the high input current limit until the port voltage drops below the UVLO turn-off threshold. APPLICATIONS INFORMATION VPORTP C1 5μF MIN VPORTN VNEG VIN LTC4268-1 42681 F07 TO PSE UNDERVOLTAGE LOCKOUT CIRCUIT CURRENT-LIMITED TURN ON + VPORT LTC4268-1 VOLTAGE POWER MOSFET 0V TO UVLO* OFF >UVLO* ON *UVLO INCLUDES HYSTERESIS RISING INPUT THRESHOLD –38.9V FALLING INPUT THRESHOLD –30.6V Figure 7. LTC4268-1 Undervoltage Lockout |
