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LTC4267CGN-1 Datasheet(PDF) 11 Page - Linear Technology |
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LTC4267CGN-1 Datasheet(HTML) 11 Page - Linear Technology |
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11 / 32 page  LTC4267-1 11 42671f Series Diodes The IEEE 802.3af-defined operating modes for a PD refer- ence the input voltage at the RJ45 connector on the PD. The PD must be able to accept power of either polarity at each of its inputs, so it is common to install diode bridges (Figure 2). The LTC4267-1 takes this into account by compensating for these diode drops in the threshold points for each range of operation. A similar adjustment is made for the UVLO voltages. Detection During detection, the PSE will apply a voltage in the range of –2.8V to –10V on the cable and look for a 25k signature resistor. This identifies the device at the end of the cable as a PD. With the terminal voltage in this range, the LTC4267-1 connects an internal 25k resistor between the VPORTP and VPORTN pins. This precision, temperature compensated resistor presents the proper signature to alert the PSE that a PD is present and desires power to be applied. The internal low-leakage UVLO switch prevents the switching regulator circuitry from affecting the detec- tion signature. The LTC4267-1 is designed to compensate for the voltage and resistance effects of the IEEE required diode bridge. The signature range extends below the IEEE range to ac- commodate the voltage drop of the two diodes. The IEEE specification requires the PSE to use a ΔV/ΔImeasurement technique to keep the DC offset of these diodes from af- fecting the signature resistance measurement. However, the diode resistance appears in series with the signature resistor and must be included in the overall signature resistance of the PD. The LTC4267-1 compensates for the two series diodes in the signature path by offsetting the resistance so that a PD built using the LTC4267-1 will meet the IEEE specification. In some applications it is necessary to control whether or not the PD is detected. In this case, the 25k signature resistor can be enabled and disabled with the use of the SIGDISA pin (Figure 3). Disabling the signature via the SIGDISA pin will change the signature resistor to 9k (typical) which is an invalid signature per the IEEE 802.3af specification. This invalid signature is present for PD input voltages from –2.8V to –10V. If the input rises above –10V, the signature resistor reverts to 25k to minimize power dissipation in the LTC4267-1. To disable the signature, tie SIGDISA to VPORTP. Alternately, the SIGDISA pin can be driven high with respect to VPORTN. When SIGDISA is high, all functions of the PD interface are disabled. APPLICATIO S I FOR ATIO Figure 2. LTC4267-1 PD Front End Using Diode Bridges on Main and Spare Inputs |
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