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LT3496EUFD-TRPBF Datasheet(PDF) 9 Page - Linear Technology |
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LT3496EUFD-TRPBF Datasheet(HTML) 9 Page - Linear Technology |
9 / 20 page LT3496 9 3496fe APPLICATIONS INFORMATION Operation The LT3496 uses a fixed frequency, current mode control scheme to provide excellent line and load regulation. Op- eration can be best understood by referring to the Block Diagram in Figure 1. The oscillator, ramp generator, refer- ence, internal regulator and UVLO are shared among the three converters. The control circuitry, power switch etc., are replicated for each of the three converters. Figure 1 shows the shared circuits and only converter 1 circuits. If the SHDN pin is tied to ground, the LT3496 is shut down and draws minimal current from VIN. If the SHDN pin exceeds 1.5V, the internal bias circuits turn on. The switching regulators start to operate when their respective PWM signal goes high. The main control loop can be understood by following the operation of converter 1. The start of each oscillator cycle sets the SR latch, A3, and turns on power switch Q1. The signal at the noninverting input (SLOPE node) of the PWM comparator A2 is proportional to the sum of the switch current and oscillator ramp. When SLOPE exceeds VC (the output of the error amplifier A1), A2 resets the latch and turns off the power switch Q1 through A4 and A5. In this manner, A10 and A2 set the correct peak current level to keep the output in regulation. Amplifier A8 has two noninverting inputs, one from the 1V internal voltage reference and the other one from the CTRL1 pin. Whichever input is lower takes precedence. A8, Q3 and R1 force V1, the voltage across R1, to be one tenth of either 1V or the voltage of CTRL1 pin, whichever is lower. VSENSE is the voltage across the sensing resistor, RSENSE, which is connected in series with the LEDs. VSENSE is compared to V1 by A1. If VSENSE is higher than V1, the output of A1 will decrease, thus reducing the amount of current delivered to LEDs. In this manner the current sensing voltage VSENSE is regulated to V1. Converters 2 and 3 are identical to converter 1. PWM Dimming Control LED1 can be dimmed with pulse width modulation us- ing the PWM1 pin and an external P-channel MOSFET, M1. If the PWM1 pin is pulled high, M1 is turned on by internal driver A7 and converter 1 operates nominally. A7 limits CAP1-TG1 to 6.5V to protect the gate of M1. If the PWM1 pin is pulled low, Q1 is turned off. Converter 1 stops operating, M1 is turned off, disconnects LED1 and stops current draw from output capacitor C2. The VC1 pin is also disconnected from the internal circuitry and draws minimal current from the compensation capacitor CC. The VC1 pin and the output capacitor store the state of the LED1 current until PWM1 is pulled up again. This leads to a highly linear relationship between pulse width and output light, and allows for a large and accurate dim- ming range. A P-channel MOSFET with smaller total gate charge (QG) improves the dimming performance, since it can be turned on and off faster. Use a MOSFET with a QG lower than 10nC, and a minimum VTH of –1V to –2V. Don’t use a Low VTH PMOS. To optimize the PWM control of all the three channels, the rising edge of all the three PWM signals should be synchronized. In the applications where high dimming ratio is not required, M1 can be omitted to reduce cost. In these conditions, TG1 should be left open. The PWM dimming range can be further increased by using CTRL1 pin to linearly adjust the current sense threshold during the PWM1 high state. Loop Compensation Loop compensation determines the stability and transient performance. The LT3496 uses current mode control to regulate the output, which simplifies loop compensation. To compensate the feedback loop of the LT3496, a series resistor-capacitor network should be connected from the VC pin to GND. For most applications, the compensation capacitor should be in the range of 100pF to 1nF. The com- pensation resistor is usually in the range of 5k to 50k. To obtain the best performance, tradeoffs should be made in the compensation network design. A higher value of compensation capacitor improves the stability and dim- ming range (a larger capacitance helps hold the VC voltage when the PWM signal is low). However, a large compen- sation capacitor also increases the start-up time and the time to recover from a fault condition. Similarly, a larger compensation resistor improves the transient response but may reduce the phase margin. A practical approach is to start with one of the circuits in this data sheet that is similar to your application and tune the compensation network to optimize the performance. The stability, PWM |
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