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LND3842A Datasheet(PDF) 4 Page - Linear Dimensions Semiconductor |
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LND3842A Datasheet(HTML) 4 Page - Linear Dimensions Semiconductor |
4 / 10 page Note 1: Parameter measured at trip point of latch with Vpin2=0 Note 2: Gain defined as A= ∆Vpin1/=∆Vpin3 : 0≤ Vpin3≤0.8V. Note 3: These parameters, although guaranteed, are not 100% tested in production. No FUNCTION DESCRIPTION 1 COMP This pin is the Error Amplifier output and is made for loop compensation 2VFB This is the inverting input of the Error Amplifier. It is normally connected to the switching power supply output through a resistor divider. 3ISENSE A voltage proportional to inductor current is connected to this input. The PWM uses this information to terminate the output switch conduction. 4RT/CT The oscillator frequency and maximum Output duty cycle are programmed by connecting resistor RT to Vref and capacitor CT to ground. 5 GROUND This pin is the combined control circuitry and power ground 6OUTPUT This output directly drives the gate of a power MOSFET. Peak currents up to 1A are sourced and sinked by this pin. 7VCC This pin is the positive supply of the integrated circuit. 8VREF This is the reference output. It provides charging current for capacitor CT through resistor RT. LND3842/43/44/45 PIN DESCRIPTION TYPICAL APPLICATIONS 2.5V 1 2 + - Figure 1. Error Amp Configuration 1mA • Linear Dimensions, Inc. • 445 East Ohio Street, Chicago IL 60611 USA • tel 312.321.1810 • fax 312.321.1830 • www.lineardimensions.com • |
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