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A3P125-1VQG144T Datasheet(PDF) 11 Page - Actel Corporation |
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A3P125-1VQG144T Datasheet(HTML) 11 Page - Actel Corporation |
11 / 136 page Automotive ProASIC3 Flash FPGAs v1.0 1 - 7 Each I/O module contains several input, output, and enable registers. These registers allow the implementation of the following: • Single-Data-Rate applications • Double-Data-Rate applications—DDR LVDS, B-LVDS, and M-LVDS I/Os for point-to-point communications Automotive ProASIC3 banks for the A3P250 and A3P1000 devices support LVPECL, LVDS, B-LVDS, and M-LVDS. B-LVDS and M-LVDS can support up to 20 loads. Part Number and Revision Date Part Number 51700099-001-0 Revised January 2008 |
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