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AGL125V5-FVQG144ES Datasheet(PDF) 8 Page - Actel Corporation |
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AGL125V5-FVQG144ES Datasheet(HTML) 8 Page - Actel Corporation |
8 / 212 page IGLOO Device Family Overview 1- 4 v1.3 In addition, extensive on-chip programming circuitry allows for rapid, single-voltage (3.3 V) programming of IGLOO devices via an IEEE 1532 JTAG interface. * Not supported by AGL015 and AGL030 devices Figure 1-1 • IGLOO Device Architecture Overview with Two I/O Banks (AGL015, AGL030, AGL060, and AGL125) Figure 1-2 • IGLOO Device Architecture Overview with Four I/O Banks (AGL250, AGL600, AGL400, and AGL1000) RAM Block 4,608-Bit Dual-Port SRAM or FIFO Block* VersaTile CCC I/Os ISP AES Decryption* User Nonvolatile FlashRom Flash*Freeze Technology Charge Pumps Bank 0 Bank 1 ISP AES Decryption* User Nonvolatile FlashRom Flash*Freeze Technology Charge Pumps RAM Block 4,608-Bit Dual-Port SRAM or FIFO Block (AGL600 and AGL1000) RAM Block 4,608-Bit Dual-Port SRAM or FIFO Block VersaTile CCC I/Os Bank 0 Bank 2 |
Similar Part No. - AGL125V5-FVQG144ES |
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