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A42MX16-TQ208A Datasheet(PDF) 11 Page - Actel Corporation |
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A42MX16-TQ208A Datasheet(HTML) 11 Page - Actel Corporation |
11 / 78 page 40MX and 42MX Automotive FPGA Families v3.1 1-7 Figure 1-11 • Silicon Explorer II Setup with 40MX Figure 1-12 • Silicon Explorer II Setup with 42MX Table 1-2 • Device Configuration Options for Probe Capability Security Fuse(s) Programmed MODE PRA, PRB1 SDI, SDO, DCLK1 No LOW User I/Os2 User I/Os2 No HIGH Probe Circuit Outputs Probe Circuit Inputs Yes – Probe Circuit Secured Probe Circuit Secured Notes: 1. Avoid using SDI, SDO, DCLK, PRA, and PRB pins as input or bidirectional ports. Since these pins are active during probing, input signals will not pass through these pins and may cause contention. 2. If no user signal is assigned to these pins, they will behave as unused I/Os in this mode. See the "Pin Descriptions" section on page 1-45 for information on unused I/O pins. 40MX Silicon Explorer II PRA PRB SDO DCLK SDI MODE Serial Connection to Windows PC 16 Logic Analyzer Channels 42MX Silicon Explorer II PRA PRB SDO DCLK SDI MODE Serial Connection to Windows PC 16 Logic Analyzer Channels |
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